From: Diego Asanza Date: Fri, 6 May 2016 22:12:09 +0000 (+0200) Subject: dslogic: Implement continuous mode X-Git-Tag: libsigrok-0.5.0~408 X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=41dc2547787ea571e1f0fb271eff964767c49203;p=libsigrok.git dslogic: Implement continuous mode For low sampling speeds (up to 25MHz) DSLogic offers a streaming mode where samples are sent directly to the USB interface, like a fx2lafw device. For high sampling speeds (up to 400MHz) only buffer mode is supported. This commit allows the user to set which mode should be used. The configuration is done by using SR_CONF_CONTINUOUS. Signed-off-by: Diego Asanza --- diff --git a/src/hardware/fx2lafw/api.c b/src/hardware/fx2lafw/api.c index ffb1cf1e..6e8eff4e 100644 --- a/src/hardware/fx2lafw/api.c +++ b/src/hardware/fx2lafw/api.c @@ -135,7 +135,7 @@ static const uint32_t devopts[] = { }; static const uint32_t dslogic_devopts[] = { - SR_CONF_CONTINUOUS | SR_CONF_SET, + SR_CONF_CONTINUOUS | SR_CONF_SET | SR_CONF_GET, SR_CONF_LIMIT_SAMPLES | SR_CONF_GET | SR_CONF_SET, SR_CONF_VOLTAGE_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST, SR_CONF_CONN | SR_CONF_GET, @@ -571,6 +571,9 @@ static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *s case SR_CONF_EXTERNAL_CLOCK: *data = g_variant_new_boolean(devc->dslogic_external_clock); break; + case SR_CONF_CONTINUOUS: + *data = g_variant_new_boolean(devc->dslogic_continuous_mode); + break; default: return SR_ERR_NA; } @@ -639,6 +642,9 @@ static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sd case SR_CONF_EXTERNAL_CLOCK: devc->dslogic_external_clock = g_variant_get_boolean(data); break; + case SR_CONF_CONTINUOUS: + devc->dslogic_continuous_mode = g_variant_get_boolean(data); + break; default: ret = SR_ERR_NA; } diff --git a/src/hardware/fx2lafw/dslogic.c b/src/hardware/fx2lafw/dslogic.c index afd11a7d..992a07a5 100644 --- a/src/hardware/fx2lafw/dslogic.c +++ b/src/hardware/fx2lafw/dslogic.c @@ -332,7 +332,7 @@ SR_PRIV int dslogic_fpga_configure(const struct sr_dev_inst *sdi) * 13 1 = loopback test mode * 12 1 = stream mode * 11 1 = serial trigger - * 8-12 unused + * 8-10 unused * 7 1 = analog mode * 6 1 = samplerate 400MHz * 5 1 = samplerate 200MHz or analog mode @@ -348,6 +348,8 @@ SR_PRIV int dslogic_fpga_configure(const struct sr_dev_inst *sdi) v16 = 1 << 14; else if (devc->dslogic_mode == DS_OP_LOOPBACK_TEST) v16 = 1 << 13; + if (devc->dslogic_continuous_mode) + v16 |= 1 << 12; if (devc->dslogic_external_clock) v16 |= 1 << 1; diff --git a/src/hardware/fx2lafw/protocol.c b/src/hardware/fx2lafw/protocol.c index f028d132..51134629 100644 --- a/src/hardware/fx2lafw/protocol.c +++ b/src/hardware/fx2lafw/protocol.c @@ -306,6 +306,7 @@ SR_PRIV struct dev_context *fx2lafw_dev_new(void) devc->limit_samples = 0; devc->capture_ratio = 0; devc->sample_wide = FALSE; + devc->dslogic_continuous_mode = FALSE; devc->stl = NULL; return devc; diff --git a/src/hardware/fx2lafw/protocol.h b/src/hardware/fx2lafw/protocol.h index a02c697f..b9ceebb7 100644 --- a/src/hardware/fx2lafw/protocol.h +++ b/src/hardware/fx2lafw/protocol.h @@ -136,6 +136,7 @@ struct dev_context { uint16_t dslogic_mode; uint32_t trigger_pos; gboolean dslogic_external_clock; + gboolean dslogic_continuous_mode; int dslogic_voltage_threshold; };