From: Uwe Hermann <redacted>
Date: Thu, 1 Dec 2011 10:04:35 +0000 (+0100)
Subject: srd: i2c.py: States are global, not per-instance.
X-Git-Tag: libsigrokdecode-0.1.0~251
X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=400f9ae7ff16bb611d758d75ff4931b667561b11;p=libsigrokdecode.git

srd: i2c.py: States are global, not per-instance.
---

diff --git a/decoders/i2c.py b/decoders/i2c.py
index 7c3b087..93cf167 100644
--- a/decoders/i2c.py
+++ b/decoders/i2c.py
@@ -126,6 +126,11 @@
 #  'signals': [{'SCL': }]}
 #
 
+# States
+FIND_START = 0
+FIND_ADDRESS = 1
+FIND_DATA = 2
+
 class Sample():
     def __init__(self, data):
         self.data = data
@@ -168,8 +173,7 @@ class Decoder():
         self.startsample = -1
         self.is_repeat_start = 0
 
-        self.FIND_START, self.FIND_ADDRESS, self.FIND_DATA = range(3)
-        self.state = self.FIND_START
+        self.state = FIND_START
 
         # Get the channel/probe number of the SCL/SDA signals.
         self.scl_bit = self.probes['scl']['ch']
@@ -208,7 +212,7 @@ class Decoder():
         #      'data': None, 'ann': None},
         o = (self.is_repeat_start == 1) and 'Sr' or 'S'
         out.append(o)
-        self.state = self.FIND_ADDRESS
+        self.state = FIND_ADDRESS
         self.bitcount = self.databyte = 0
         self.is_repeat_start = 1
         self.wr = -1
@@ -235,11 +239,11 @@ class Decoder():
 
         ack = (sda == 1) and 'N' or 'A'
 
-        if self.state == self.FIND_ADDRESS:
+        if self.state == FIND_ADDRESS:
             d = self.databyte & 0xfe
             # The READ/WRITE bit is only in address bytes, not data bytes.
             self.wr = (self.databyte & 1) and 1 or 0
-        elif self.state == self.FIND_DATA:
+        elif self.state == FIND_DATA:
             d = self.databyte
         else:
             # TODO: Error?
@@ -252,13 +256,13 @@ class Decoder():
         o = {'data': '0x%02x' % d}
 
         # TODO: Simplify.
-        if self.state == self.FIND_ADDRESS and self.wr == 1:
+        if self.state == FIND_ADDRESS and self.wr == 1:
             o['type'] = 'AW'
-        elif self.state == self.FIND_ADDRESS and self.wr == 0:
+        elif self.state == FIND_ADDRESS and self.wr == 0:
             o['type'] = 'AR'
-        elif self.state == self.FIND_DATA and self.wr == 1:
+        elif self.state == FIND_DATA and self.wr == 1:
             o['type'] = 'DW'
-        elif self.state == self.FIND_DATA and self.wr == 0:
+        elif self.state == FIND_DATA and self.wr == 0:
             o['type'] = 'DR'
 
         out.append(o)
@@ -270,9 +274,9 @@ class Decoder():
         self.bitcount = self.databyte = 0
         self.startsample = -1
 
-        if self.state == self.FIND_ADDRESS:
-            self.state = self.FIND_DATA
-        elif self.state == self.FIND_DATA:
+        if self.state == FIND_ADDRESS:
+            self.state = FIND_DATA
+        elif self.state == FIND_DATA:
             # There could be multiple data bytes in a row.
             # So, either find a STOP condition or another data byte next.
             pass
@@ -286,7 +290,7 @@ class Decoder():
         #      'data': None, 'ann': None},
         o = 'P'
         out.append(o)
-        self.state = self.FIND_START
+        self.state = FIND_START
         self.is_repeat_start = 0
         self.wr = -1
 
@@ -321,13 +325,13 @@ class Decoder():
             # TODO: Wait until the bus is idle (SDA = SCL = 1) first?
 
             # State machine.
-            if self.state == self.FIND_START:
+            if self.state == FIND_START:
                 if self.is_start_condition(scl, sda):
                     out += self.find_start(scl, sda)
-            elif self.state == self.FIND_ADDRESS:
+            elif self.state == FIND_ADDRESS:
                 if self.is_data_bit(scl, sda):
                     out += self.find_address_or_data(scl, sda)
-            elif self.state == self.FIND_DATA:
+            elif self.state == FIND_DATA:
                 if self.is_data_bit(scl, sda):
                     out += self.find_address_or_data(scl, sda)
                 elif self.is_start_condition(scl, sda):