From: Uwe Hermann <redacted>
Date: Sat, 14 Jan 2012 17:08:00 +0000 (+0100)
Subject: srd: SPI: Add support for bit order option.
X-Git-Tag: libsigrokdecode-0.1.0~155
X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=1ea831e97a3c65b820c049220480def1636cb0b5;p=libsigrokdecode.git

srd: SPI: Add support for bit order option.
---

diff --git a/decoders/spi.py b/decoders/spi.py
index 457abb5..0c98c1d 100644
--- a/decoders/spi.py
+++ b/decoders/spi.py
@@ -112,11 +112,17 @@ class Decoder(srd.Decoder):
             if self.bitcount == 0:
                 self.start_sample = samplenum
 
-            # Receive bit into our shift register.
-            if mosi == 1:
-                self.mosidata |= 1 << (7 - self.bitcount)
-            if miso == 1:
-                self.misodata |= 1 << (7 - self.bitcount)
+            # Receive MOSI bit into our shift register.
+            if self.bit_order == MSB_FIRST:
+                self.mosidata |= mosi << (7 - self.bitcount)
+            else:
+                self.mosidata |= mosi << self.bitcount
+
+            # Receive MISO bit into our shift register.
+            if self.bit_order == MSB_FIRST:
+                self.misodata |= miso << (7 - self.bitcount)
+            else:
+                self.misodata |= miso << self.bitcount
 
             self.bitcount += 1