From: Paul Kasemir Date: Tue, 13 Dec 2022 00:25:15 +0000 (-0700) Subject: link-mso19: Refactor to remove TRIG_UPDATE_* macros X-Git-Url: https://sigrok.org/gitaction?a=commitdiff_plain;h=1b12204ae453990c9114abc458bbb1a9289311da;p=libsigrok.git link-mso19: Refactor to remove TRIG_UPDATE_* macros We now calculate the trigger register on the fly like threshold value. --- diff --git a/src/hardware/link-mso19/api.c b/src/hardware/link-mso19/api.c index afb9003c..eb414178 100644 --- a/src/hardware/link-mso19/api.c +++ b/src/hardware/link-mso19/api.c @@ -113,30 +113,47 @@ static const uint16_t logic_threshold_values[] = { 0xfff, }; -static void mso_update_trigger_slope(struct dev_context *devc) +/* This function needs to be in api.c because we use the API indices + * TRIGGER_SOURCE_* and TRIGGER_SLOPE_* to determine how to set the + * trigger_register bits. */ +SR_PRIV uint8_t mso_calc_trigger_register(struct dev_context *devc, + uint16_t threshold_value) { + uint8_t source_bits, trig_out_bits, edge_bit, thresh_msb; + + /* TODO: implement other TRIG_OUT_* options */ + trig_out_bits = TRIG_OUT_TRIGGER; + source_bits = 0; + edge_bit = 0; + thresh_msb = (threshold_value >> 8) & TRIG_THRESH_MSB_MASK; + + switch (devc->trigger_source) { case TRIGGER_SOURCE_DSO: + source_bits = TRIG_SRC_DSO; switch (devc->dso_trigger_slope) { case TRIGGER_SLOPE_RISING: - TRIG_UPDATE_EDGE(devc->ctltrig, TRIG_EDGE_RISING); + edge_bit = TRIG_EDGE_RISING; break; case TRIGGER_SLOPE_FALLING: - TRIG_UPDATE_EDGE(devc->ctltrig, TRIG_EDGE_FALLING); + edge_bit = TRIG_EDGE_FALLING; break; } break; case TRIGGER_SOURCE_LA: + source_bits = TRIG_SRC_LA; switch (devc->la_trigger_slope) { case TRIGGER_SLOPE_F_T: - TRIG_UPDATE_EDGE(devc->ctltrig, TRIG_EDGE_F_T); + edge_bit = TRIG_EDGE_F_T; break; case TRIGGER_SLOPE_T_F: - TRIG_UPDATE_EDGE(devc->ctltrig, TRIG_EDGE_T_F); + edge_bit = TRIG_EDGE_T_F; break; } break; } + + return source_bits | trig_out_bits | edge_bit | thresh_msb; } static void mso_set_trigger_level(struct dev_context *devc, @@ -249,9 +266,9 @@ static GSList* scan_handle_port(GSList *devices, struct sp_port *port) } sprintf(hwrev, "r%d", devc->hwrev); devc->ctlbase1 = BIT_CTL1_ADC_ENABLE; - TRIG_UPDATE_OUT(devc->ctltrig, TRIG_OUT_TRIGGER); - TRIG_UPDATE_SRC(devc->ctltrig, TRIG_SRC_DSO); - mso_update_trigger_slope(devc); + devc->trigger_source = TRIGGER_SOURCE_DSO; + devc->dso_trigger_slope = TRIGGER_SLOPE_RISING; + devc->la_trigger_slope = TRIGGER_SLOPE_F_T; mso_set_trigger_pos(devc, 0.5); devc->coupling = coupling[0]; devc->cur_rate = SR_KHZ(10); @@ -461,15 +478,6 @@ static int config_set(uint32_t key, GVariant *data, if (idx < 0) return SR_ERR_ARG; devc->trigger_source = idx; - switch (idx) { - case TRIGGER_SOURCE_DSO: - TRIG_UPDATE_SRC(devc->ctltrig, TRIG_SRC_DSO); - break; - case TRIGGER_SOURCE_LA: - TRIG_UPDATE_SRC(devc->ctltrig, TRIG_SRC_LA); - break; - } - mso_update_trigger_slope(devc); break; case SR_CONF_TRIGGER_SLOPE: if (CG_IS_ANALOG(cg)) { @@ -485,7 +493,6 @@ static int config_set(uint32_t key, GVariant *data, } else { return SR_ERR_NA; } - mso_update_trigger_slope(devc); break; case SR_CONF_TRIGGER_LEVEL: if (!CG_IS_ANALOG(cg)) diff --git a/src/hardware/link-mso19/protocol.c b/src/hardware/link-mso19/protocol.c index 724f7358..e63b4586 100644 --- a/src/hardware/link-mso19/protocol.c +++ b/src/hardware/link-mso19/protocol.c @@ -99,16 +99,16 @@ SR_PRIV int mso_configure_trigger(const struct sr_dev_inst *sdi) { struct dev_context *devc; uint16_t threshold_value; + uint8_t reg_trig; devc = sdi->priv; threshold_value = mso_calc_trigger_threshold(devc); - - TRIG_UPDATE_THRESH_MSB(devc->ctltrig, threshold_value); + // REG_TRIG also holds the 2 MSB bits from the threshold value + reg_trig = mso_calc_trigger_register(devc, threshold_value); uint16_t ops[] = { mso_trans(REG_TRIG_THRESH, threshold_value & 0xff), - //The trigger_config also holds the 2 MSB bits from the threshold value - mso_trans(REG_TRIG, devc->ctltrig), + mso_trans(REG_TRIG, reg_trig), mso_trans(REG_TRIG_LA_VAL, devc->la_trigger), mso_trans(REG_TRIG_LA_MASK, devc->la_trigger_mask), mso_trans(REG_TRIG_POS_LSB, devc->ctltrig_pos & 0xff), diff --git a/src/hardware/link-mso19/protocol.h b/src/hardware/link-mso19/protocol.h index 22b7082e..cda6338b 100644 --- a/src/hardware/link-mso19/protocol.h +++ b/src/hardware/link-mso19/protocol.h @@ -87,7 +87,6 @@ struct dev_context { /* register cache */ uint8_t ctlbase1; uint8_t ctlbase2; - uint8_t ctltrig; uint16_t ctltrig_pos; uint8_t status; @@ -114,6 +113,11 @@ struct dev_context { char buffer[4096]; }; +/* from api.c */ +SR_PRIV uint8_t mso_calc_trigger_register(struct dev_context *devc, + uint16_t threshold_value); + +/* from protocol.c */ SR_PRIV int mso_parse_serial(const char *serial_num, const char *product, struct dev_context *ctx); SR_PRIV int mso_read_status(struct sr_serial_dev_inst *serial, @@ -179,12 +183,10 @@ enum { TRIG_EDGE_FALLING = 1 << 2, TRIG_EDGE_T_F = 0 << 2, TRIG_EDGE_F_T = 1 << 2, - TRIG_EDGE_MASK = 1 << 2, TRIG_OUT_TRIGGER = 0 << 3, TRIG_OUT_PG = 1 << 3, TRIG_OUT_NOISE = 3 << 3, - TRIG_OUT_MASK = 3 << 3, TRIG_SRC_DSO = 0 << 5, TRIG_SRC_DSO_PULSE_GE = 1 << 5, @@ -192,13 +194,7 @@ enum { TRIG_SRC_SPI = 4 << 5, TRIG_SRC_I2C = 5 << 5, TRIG_SRC_LA = 7 << 5, - TRIG_SRC_MASK = 7 << 5, }; -#define TRIG_UPDATE_MASK(reg, val, mask) reg = (((reg) & ~(mask)) | ((val) & (mask))) -#define TRIG_UPDATE_THRESH_MSB(reg, val) TRIG_UPDATE_MASK((reg), (val) >> 8, TRIG_THRESH_MSB_MASK) -#define TRIG_UPDATE_EDGE(reg, val) TRIG_UPDATE_MASK((reg), (val), TRIG_EDGE_MASK) -#define TRIG_UPDATE_OUT(reg, val) TRIG_UPDATE_MASK((reg), (val), TRIG_OUT_MASK) -#define TRIG_UPDATE_SRC(reg, val) TRIG_UPDATE_MASK((reg), (val), TRIG_SRC_MASK) /* bits - REG_TRIG_POS_MSB */ enum {