src/hardware/kern-scale/protocol.c \
src/hardware/kern-scale/api.c
endif
+if HW_KINGST_LA2016
+src_libdrivers_la_SOURCES += \
+ src/hardware/kingst-la2016/protocol.h \
+ src/hardware/kingst-la2016/protocol.c \
+ src/hardware/kingst-la2016/api.c
+endif
if HW_KORAD_KAXXXXP
src_libdrivers_la_SOURCES += \
src/hardware/korad-kaxxxxp/protocol.h \
SR_DRIVER([IPDBG LA], [ipdbg-la])
SR_DRIVER([Kecheng KC-330B], [kecheng-kc-330b], [libusb])
SR_DRIVER([KERN scale], [kern-scale], [serial_comm])
+SR_DRIVER([Kingst LA2016], [kingst-la2016], [libusb])
SR_DRIVER([Korad KAxxxxP], [korad-kaxxxxp], [serial_comm])
SR_DRIVER([Lascar EL-USB], [lascar-el-usb], [libusb])
SR_DRIVER([LeCroy LogicStudio], [lecroy-logicstudio], [libusb])
--- /dev/null
+/*
+ * This file is part of the libsigrok project.
+ *
+ * Copyright (C) 2020 Florian Schmidt <schmidt_florian@gmx.de>
+ * Copyright (C) 2013 Marcus Comstedt <marcus@mc.pp.se>
+ * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
+ * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* mostly stolen from src/hardware/saleae-logic16/ */
+
+#include <config.h>
+#include <glib.h>
+#include <libusb.h>
+#include <stdlib.h>
+#include <string.h>
+#include <math.h>
+#include <libsigrok/libsigrok.h>
+#include "libsigrok-internal.h"
+#include "protocol.h"
+
+static const uint32_t scanopts[] = {
+ SR_CONF_CONN,
+};
+
+static const uint32_t drvopts[] = {
+ SR_CONF_LOGIC_ANALYZER,
+};
+
+static const uint32_t devopts[] = {
+ /* TODO: SR_CONF_CONTINUOUS, */
+ SR_CONF_CONN | SR_CONF_GET,
+ SR_CONF_SAMPLERATE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+ SR_CONF_LIMIT_SAMPLES | SR_CONF_SET | SR_CONF_GET | SR_CONF_LIST,
+ SR_CONF_VOLTAGE_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+ SR_CONF_LOGIC_THRESHOLD | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+ SR_CONF_LOGIC_THRESHOLD_CUSTOM | SR_CONF_GET | SR_CONF_SET,
+ SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
+ SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
+};
+
+static const int32_t trigger_matches[] = {
+ SR_TRIGGER_ZERO,
+ SR_TRIGGER_ONE,
+ SR_TRIGGER_RISING,
+ SR_TRIGGER_FALLING,
+};
+
+static const char *channel_names[] = {
+ "0", "1", "2", "3", "4", "5", "6", "7", "8",
+ "9", "10", "11", "12", "13", "14", "15",
+};
+
+static const uint64_t samplerates[] = {
+ SR_KHZ(20),
+ SR_KHZ(50),
+ SR_KHZ(100),
+ SR_KHZ(200),
+ SR_KHZ(500),
+ SR_MHZ(1),
+ SR_MHZ(2),
+ SR_MHZ(4),
+ SR_MHZ(5),
+ SR_MHZ(8),
+ SR_MHZ(10),
+ SR_MHZ(20),
+ SR_MHZ(50),
+ SR_MHZ(100),
+ SR_MHZ(200),
+};
+
+static const float logic_threshold_value[] = {
+ 1.58,
+ 2.5,
+ 1.165,
+ 1.5,
+ 1.25,
+ 0.9,
+ 0.75,
+ 0.60,
+ 0.45,
+};
+
+static const char *logic_threshold[] = {
+ "TTL 5V",
+ "CMOS 5V",
+ "CMOS 3.3V",
+ "CMOS 3.0V",
+ "CMOS 2.5V",
+ "CMOS 1.8V",
+ "CMOS 1.5V",
+ "CMOS 1.2V",
+ "CMOS 0.9V",
+ "USER",
+};
+
+#define MAX_NUM_LOGIC_THRESHOLD_ENTRIES ARRAY_SIZE(logic_threshold)
+
+#define array_length(a) (sizeof(a) / sizeof((a)[0]))
+
+static GSList *scan(struct sr_dev_driver *di, GSList *options)
+{
+ struct drv_context *drvc;
+ struct dev_context *devc;
+ struct sr_dev_inst *sdi;
+ struct sr_usb_dev_inst *usb;
+ struct sr_config *src;
+ GSList *l;
+ GSList *devices;
+ GSList *conn_devices;
+ struct libusb_device_descriptor des;
+ libusb_device **devlist;
+ unsigned int i, j;
+ const char *conn;
+ char connection_id[64];
+ int64_t fw_updated;
+ unsigned int dev_addr;
+
+ drvc = di->context;
+
+ conn = NULL;
+ for (l = options; l; l = l->next) {
+ src = l->data;
+ switch (src->key) {
+ case SR_CONF_CONN:
+ conn = g_variant_get_string(src->data, NULL);
+ break;
+ }
+ }
+ if (conn)
+ conn_devices = sr_usb_find(drvc->sr_ctx->libusb_ctx, conn);
+ else
+ conn_devices = NULL;
+
+ /* Find all LA2016 devices and upload firmware to them. */
+ devices = NULL;
+ libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
+ for (i = 0; devlist[i]; i++) {
+ if (conn) {
+ usb = NULL;
+ for (l = conn_devices; l; l = l->next) {
+ usb = l->data;
+ if (usb->bus == libusb_get_bus_number(devlist[i])
+ && usb->address == libusb_get_device_address(devlist[i]))
+ break;
+ }
+ if (!l)
+ /* This device matched none of the ones that
+ * matched the conn specification. */
+ continue;
+ }
+
+ libusb_get_device_descriptor(devlist[i], &des);
+
+ if (usb_get_port_path(devlist[i], connection_id, sizeof(connection_id)) < 0)
+ continue;
+
+ if (des.idVendor != LA2016_VID || des.idProduct != LA2016_PID)
+ continue;
+
+ /* Already has the firmware */
+ sr_dbg("Found a LA2016 device.");
+ sdi = g_malloc0(sizeof(struct sr_dev_inst));
+ sdi->status = SR_ST_INITIALIZING;
+ sdi->connection_id = g_strdup(connection_id);
+
+ fw_updated = 0;
+ dev_addr = libusb_get_device_address(devlist[i]);
+ if (des.iProduct != 2) {
+ sr_info("device at '%s' has no firmware loaded!", connection_id);
+
+ if (la2016_upload_firmware(drvc->sr_ctx, devlist[i], des.idProduct) != SR_OK) {
+ sr_err("uC firmware upload failed!");
+ g_free(sdi->connection_id);
+ g_free(sdi);
+ continue;
+ }
+ fw_updated = g_get_monotonic_time();
+ dev_addr = 0xff; /* to mark that we don't know address yet... ugly */
+ }
+
+ sdi->vendor = g_strdup("Kingst");
+ sdi->model = g_strdup("LA2016");
+
+ for (j = 0; j < ARRAY_SIZE(channel_names); j++)
+ sr_channel_new(sdi, j, SR_CHANNEL_LOGIC, TRUE, channel_names[j]);
+
+ devices = g_slist_append(devices, sdi);
+
+ devc = g_malloc0(sizeof(struct dev_context));
+ sdi->priv = devc;
+ devc->fw_updated = fw_updated;
+ devc->threshold_voltage_idx = 0;
+ devc->threshold_voltage = logic_threshold_value[devc->threshold_voltage_idx];
+
+ sdi->status = SR_ST_INACTIVE;
+ sdi->inst_type = SR_INST_USB;
+
+ sdi->conn = sr_usb_dev_inst_new(
+ libusb_get_bus_number(devlist[i]),
+ dev_addr, NULL);
+ }
+ libusb_free_device_list(devlist, 1);
+ g_slist_free_full(conn_devices, (GDestroyNotify)sr_usb_dev_inst_free);
+
+ return std_scan_complete(di, devices);
+}
+
+static int la2016_dev_open(struct sr_dev_inst *sdi)
+{
+ struct sr_dev_driver *di;
+ libusb_device **devlist;
+ struct sr_usb_dev_inst *usb;
+ struct libusb_device_descriptor des;
+ struct drv_context *drvc;
+ int ret, i, device_count;
+ char connection_id[64];
+
+ di = sdi->driver;
+ drvc = di->context;
+ usb = sdi->conn;
+ ret = SR_ERR;
+
+ device_count = libusb_get_device_list(drvc->sr_ctx->libusb_ctx, &devlist);
+ if (device_count < 0) {
+ sr_err("Failed to get device list: %s.", libusb_error_name(device_count));
+ return SR_ERR;
+ }
+
+ for (i = 0; i < device_count; i++) {
+ libusb_get_device_descriptor(devlist[i], &des);
+
+ if (des.idVendor != LA2016_VID || des.idProduct != LA2016_PID || des.iProduct != 2)
+ continue;
+
+ if ((sdi->status == SR_ST_INITIALIZING) || (sdi->status == SR_ST_INACTIVE)) {
+ /*
+ * Check device by its physical USB bus/port address.
+ */
+ if (usb_get_port_path(devlist[i], connection_id, sizeof(connection_id)) < 0)
+ continue;
+
+ if (strcmp(sdi->connection_id, connection_id))
+ /* This is not the one. */
+ continue;
+ }
+
+ if (!(ret = libusb_open(devlist[i], &usb->devhdl))) {
+ if (usb->address == 0xff)
+ /*
+ * First time we touch this device after FW
+ * upload, so we don't know the address yet.
+ */
+ usb->address = libusb_get_device_address(devlist[i]);
+ } else {
+ sr_err("Failed to open device: %s.", libusb_error_name(ret));
+ ret = SR_ERR;
+ break;
+ }
+
+ ret = libusb_claim_interface(usb->devhdl, USB_INTERFACE);
+ if (ret == LIBUSB_ERROR_BUSY) {
+ sr_err("Unable to claim USB interface. Another "
+ "program or driver has already claimed it.");
+ ret = SR_ERR;
+ break;
+ } else if (ret == LIBUSB_ERROR_NO_DEVICE) {
+ sr_err("Device has been disconnected.");
+ ret = SR_ERR;
+ break;
+ } else if (ret != 0) {
+ sr_err("Unable to claim interface: %s.", libusb_error_name(ret));
+ ret = SR_ERR;
+ break;
+ }
+
+ if ((ret = la2016_init_device(sdi)) != SR_OK) {
+ sr_err("Failed to init device.");
+ break;
+ }
+
+ sr_info("Opened device on %d.%d (logical) / %s (physical), interface %d.",
+ usb->bus, usb->address, sdi->connection_id, USB_INTERFACE);
+
+ ret = SR_OK;
+
+ break;
+ }
+
+ libusb_free_device_list(devlist, 1);
+
+ if (ret != SR_OK) {
+ if (usb->devhdl) {
+ libusb_release_interface(usb->devhdl, USB_INTERFACE);
+ libusb_close(usb->devhdl);
+ usb->devhdl = NULL;
+ }
+ return SR_ERR;
+ }
+
+ return SR_OK;
+}
+
+static int dev_open(struct sr_dev_inst *sdi)
+{
+ struct dev_context *devc;
+ int64_t timediff_us, timediff_ms;
+ uint64_t reset_done;
+ uint64_t now;
+ int ret;
+
+ devc = sdi->priv;
+
+ /*
+ * If the firmware was recently uploaded, wait up to MAX_RENUM_DELAY_MS
+ * milliseconds for the FX2 to renumerate.
+ */
+ ret = SR_ERR;
+ if (devc->fw_updated > 0) {
+ sr_info("Waiting for device to reset after firmware upload.");
+ /* Takes >= 2000ms for the uC to be gone from the USB bus. */
+ reset_done = devc->fw_updated + 18 * (uint64_t)1e5; /* 1.8 seconds */
+ now = g_get_monotonic_time();
+ if (reset_done > now)
+ g_usleep(reset_done - now);
+ timediff_ms = 0;
+ while (timediff_ms < MAX_RENUM_DELAY_MS) {
+ g_usleep(200 * 1000);
+
+ timediff_us = g_get_monotonic_time() - devc->fw_updated;
+ timediff_ms = timediff_us / 1000;
+
+ if ((ret = la2016_dev_open(sdi)) == SR_OK)
+ break;
+ sr_spew("Waited %" PRIi64 "ms.", timediff_ms);
+ }
+ if (ret != SR_OK) {
+ sr_err("Device failed to re-enumerate.");
+ return SR_ERR;
+ }
+ sr_info("Device came back after %" PRIi64 "ms.", timediff_ms);
+ } else
+ ret = la2016_dev_open(sdi);
+
+ if (ret != SR_OK) {
+ sr_err("Unable to open device.");
+ return SR_ERR;
+ }
+
+ return SR_OK;
+}
+
+static int dev_close(struct sr_dev_inst *sdi)
+{
+ struct sr_usb_dev_inst *usb;
+
+ usb = sdi->conn;
+
+ if (!usb->devhdl)
+ return SR_ERR_BUG;
+
+ la2016_deinit_device(sdi);
+
+ sr_info("Closing device on %d.%d (logical) / %s (physical) interface %d.",
+ usb->bus, usb->address, sdi->connection_id, USB_INTERFACE);
+ libusb_release_interface(usb->devhdl, USB_INTERFACE);
+ libusb_close(usb->devhdl);
+ usb->devhdl = NULL;
+
+ return SR_OK;
+}
+
+static int config_get(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
+{
+ struct dev_context *devc;
+ struct sr_usb_dev_inst *usb;
+ double rounded;
+
+ (void)cg;
+
+ if (!sdi)
+ return SR_ERR_ARG;
+ devc = sdi->priv;
+
+ switch (key) {
+ case SR_CONF_CONN:
+ if (!sdi->conn)
+ return SR_ERR_ARG;
+ usb = sdi->conn;
+ if (usb->address == 255)
+ /* Device still needs to re-enumerate after firmware
+ * upload, so we don't know its (future) address. */
+ return SR_ERR;
+ *data = g_variant_new_printf("%d.%d", usb->bus, usb->address);
+ break;
+ case SR_CONF_SAMPLERATE:
+ *data = g_variant_new_uint64(devc->cur_samplerate);
+ break;
+ case SR_CONF_LIMIT_SAMPLES:
+ *data = g_variant_new_uint64(devc->limit_samples);
+ break;
+ case SR_CONF_CAPTURE_RATIO:
+ *data = g_variant_new_uint64(devc->capture_ratio);
+ break;
+ case SR_CONF_VOLTAGE_THRESHOLD:
+ rounded = (int)(devc->threshold_voltage / 0.1) * 0.1;
+ *data = std_gvar_tuple_double(rounded, rounded + 0.1);
+ return SR_OK;
+ case SR_CONF_LOGIC_THRESHOLD:
+ *data = g_variant_new_string(logic_threshold[devc->threshold_voltage_idx]);
+ break;
+ case SR_CONF_LOGIC_THRESHOLD_CUSTOM:
+ *data = g_variant_new_double(devc->threshold_voltage);
+ break;
+
+ default:
+ return SR_ERR_NA;
+ }
+
+ return SR_OK;
+}
+
+static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
+{
+ struct dev_context *devc;
+ double low, high;
+ int idx;
+
+ (void)cg;
+
+ devc = sdi->priv;
+
+ switch (key) {
+ case SR_CONF_SAMPLERATE:
+ devc->cur_samplerate = g_variant_get_uint64(data);
+ break;
+ case SR_CONF_LIMIT_SAMPLES:
+ devc->limit_samples = g_variant_get_uint64(data);
+ break;
+ case SR_CONF_CAPTURE_RATIO:
+ devc->capture_ratio = g_variant_get_uint64(data);
+ break;
+ case SR_CONF_VOLTAGE_THRESHOLD:
+ g_variant_get(data, "(dd)", &low, &high);
+ devc->threshold_voltage = (low + high) / 2.0;
+ devc->threshold_voltage_idx = MAX_NUM_LOGIC_THRESHOLD_ENTRIES - 1; /* USER */
+ break;
+ case SR_CONF_LOGIC_THRESHOLD: {
+ if ((idx = std_str_idx(data, logic_threshold, MAX_NUM_LOGIC_THRESHOLD_ENTRIES)) < 0)
+ return SR_ERR_ARG;
+ if (idx == MAX_NUM_LOGIC_THRESHOLD_ENTRIES - 1) {
+ /* user threshold */
+ } else {
+ devc->threshold_voltage = logic_threshold_value[idx];
+ }
+ devc->threshold_voltage_idx = idx;
+ break;
+ }
+ case SR_CONF_LOGIC_THRESHOLD_CUSTOM:
+ devc->threshold_voltage = g_variant_get_double(data);
+ break;
+ default:
+ return SR_ERR_NA;
+ }
+
+ return SR_OK;
+}
+
+static int config_list(uint32_t key, GVariant **data, const struct sr_dev_inst *sdi, const struct sr_channel_group *cg)
+{
+ switch (key) {
+ case SR_CONF_SCAN_OPTIONS:
+ case SR_CONF_DEVICE_OPTIONS:
+ return STD_CONFIG_LIST(key, data, sdi, cg, scanopts, drvopts, devopts);
+ case SR_CONF_SAMPLERATE:
+ *data = std_gvar_samplerates(ARRAY_AND_SIZE(samplerates));
+ break;
+ case SR_CONF_LIMIT_SAMPLES:
+ *data = std_gvar_tuple_u64(LA2016_NUM_SAMPLES_MIN, LA2016_NUM_SAMPLES_MAX);
+ break;
+ case SR_CONF_VOLTAGE_THRESHOLD:
+ *data = std_gvar_min_max_step_thresholds(
+ LA2016_THR_VOLTAGE_MIN,
+ LA2016_THR_VOLTAGE_MAX, 0.1);
+ break;
+ case SR_CONF_TRIGGER_MATCH:
+ *data = std_gvar_array_i32(ARRAY_AND_SIZE(trigger_matches));
+ break;
+ case SR_CONF_LOGIC_THRESHOLD:
+ *data = g_variant_new_strv(logic_threshold, MAX_NUM_LOGIC_THRESHOLD_ENTRIES);
+ break;
+ default:
+ return SR_ERR_NA;
+ }
+
+ return SR_OK;
+}
+
+static void send_chunk(struct sr_dev_inst *sdi, transfer_packet_t *packets, unsigned int num_tfers)
+{
+ struct dev_context *devc;
+ struct sr_datafeed_logic logic;
+ struct sr_datafeed_packet sr_packet;
+ transfer_packet_t *packet;
+ acq_packet_t *p;
+ unsigned int max_samples, n_samples, total_samples, free_n_samples, ptotal;
+ unsigned int i, j, k;
+ int do_signal_trigger;
+ uint16_t *wp;
+
+ devc = sdi->priv;
+
+ logic.unitsize = 2;
+ logic.data = devc->convbuffer;
+
+ sr_packet.type = SR_DF_LOGIC;
+ sr_packet.payload = &logic;
+
+ max_samples = devc->convbuffer_size / 2;
+ n_samples = 0;
+ wp = (uint16_t*)devc->convbuffer;
+ total_samples = 0;
+ do_signal_trigger = 0;
+
+ if (devc->had_triggers_configured && devc->reading_behind_trigger == 0 && devc->info.n_rep_packets_before_trigger == 0) {
+ sr_packet.type = SR_DF_TRIGGER;
+ sr_packet.payload = NULL;
+ sr_session_send(sdi, &sr_packet);
+ devc->reading_behind_trigger = 1;
+
+ do_signal_trigger = 0;
+ sr_packet.type = SR_DF_LOGIC;
+ sr_packet.payload = &logic;
+ }
+
+ for (i = 0; i < num_tfers; i++) {
+ transfer_packet_host(packets[i]);
+ packet = packets + i;
+ ptotal = 0;
+ for (k = 0; k < array_length(packet->packet); k++) {
+ free_n_samples = max_samples - n_samples;
+ if (free_n_samples < 256 || do_signal_trigger) {
+ logic.length = n_samples * 2;
+ sr_session_send(sdi, &sr_packet);
+ n_samples = 0;
+ wp = (uint16_t*)devc->convbuffer;
+ if (do_signal_trigger) {
+ sr_packet.type = SR_DF_TRIGGER;
+ sr_packet.payload = NULL;
+ sr_session_send(sdi, &sr_packet);
+
+ do_signal_trigger = 0;
+ sr_packet.type = SR_DF_LOGIC;
+ sr_packet.payload = &logic;
+ }
+ }
+ p = packet->packet + k;
+ for (j = 0; j < p->repetitions; j++)
+ *(wp++) = p->state;
+ n_samples += p->repetitions;
+ total_samples += p->repetitions;
+ ptotal += p->repetitions;
+ devc->total_samples += p->repetitions;
+ if (!devc->reading_behind_trigger) {
+ devc->n_reps_until_trigger --;
+ if (devc->n_reps_until_trigger == 0) {
+ devc->reading_behind_trigger = 1;
+ do_signal_trigger = 1;
+ sr_dbg(" here is trigger position after %" PRIu64 " samples, %.6fms",
+ devc->total_samples,
+ (double)devc->total_samples / devc->cur_samplerate * 1e3);
+ }
+ }
+ }
+ }
+ if (n_samples) {
+ logic.length = n_samples * 2;
+ sr_session_send(sdi, &sr_packet);
+ if (do_signal_trigger) {
+ sr_packet.type = SR_DF_TRIGGER;
+ sr_packet.payload = NULL;
+ sr_session_send(sdi, &sr_packet);
+ }
+ }
+ sr_dbg("send_chunk done after %d samples", total_samples);
+}
+
+static void LIBUSB_CALL receive_transfer(struct libusb_transfer *transfer)
+{
+ struct sr_dev_inst *sdi;
+ struct dev_context *devc;
+ struct sr_usb_dev_inst *usb;
+ int ret;
+
+ sdi = transfer->user_data;
+ devc = sdi->priv;
+ usb = sdi->conn;
+
+ sr_dbg("receive_transfer(): status %s received %d bytes.",
+ libusb_error_name(transfer->status), transfer->actual_length);
+
+ if (transfer->status == LIBUSB_TRANSFER_TIMED_OUT) {
+ sr_err("bulk transfer timeout!");
+ devc->transfer_finished = 1;
+ }
+ send_chunk(sdi, (transfer_packet_t*)transfer->buffer, transfer->actual_length / sizeof(transfer_packet_t));
+
+ devc->n_bytes_to_read -= transfer->actual_length;
+ if (devc->n_bytes_to_read) {
+ uint32_t to_read = devc->n_bytes_to_read;
+ if (to_read > LA2016_BULK_MAX)
+ to_read = LA2016_BULK_MAX;
+ libusb_fill_bulk_transfer(
+ transfer, usb->devhdl,
+ 0x86, transfer->buffer, to_read,
+ receive_transfer, (void*)sdi, DEFAULT_TIMEOUT_MS);
+
+ if ((ret = libusb_submit_transfer(transfer)) == 0)
+ return;
+ sr_err("Failed to submit further transfer: %s.", libusb_error_name(ret));
+ }
+
+ g_free(transfer->buffer);
+ libusb_free_transfer(transfer);
+ devc->transfer_finished = 1;
+}
+
+static int handle_event(int fd, int revents, void *cb_data)
+{
+ const struct sr_dev_inst *sdi;
+ struct dev_context *devc;
+ struct drv_context *drvc;
+ struct sr_datafeed_packet packet;
+ struct timeval tv;
+
+ (void)fd;
+ (void)revents;
+
+ sdi = cb_data;
+ devc = sdi->priv;
+ drvc = sdi->driver->context;
+
+ if (devc->have_trigger == 0) {
+ if (la2016_has_triggered(sdi) == 0) {
+ sr_dbg("not yet ready for download...");
+ return TRUE;
+ }
+ devc->have_trigger = 1;
+ devc->transfer_finished = 0;
+ devc->reading_behind_trigger = 0;
+ devc->total_samples = 0;
+ /* we can start retrieving data! */
+ if (la2016_start_retrieval(sdi, receive_transfer) != SR_OK) {
+ sr_err("failed to start retrieval!");
+ return FALSE;
+ }
+ sr_dbg("retrieval is started...");
+ packet.type = SR_DF_FRAME_BEGIN;
+ sr_session_send(sdi, &packet);
+
+ return TRUE;
+ }
+
+ tv.tv_sec = tv.tv_usec = 0;
+ libusb_handle_events_timeout(drvc->sr_ctx->libusb_ctx, &tv);
+
+ if (devc->transfer_finished) {
+ sr_dbg("transfer is finished!");
+ packet.type = SR_DF_FRAME_END;
+ sr_session_send(sdi, &packet);
+
+ usb_source_remove(sdi->session, drvc->sr_ctx);
+ std_session_send_df_end(sdi);
+
+ la2016_stop_acquisition(sdi);
+
+ g_free(devc->convbuffer);
+ devc->convbuffer = NULL;
+
+ sr_dbg("transfer is now finished");
+ }
+
+ return TRUE;
+}
+
+static void abort_acquisition(struct dev_context *devc)
+{
+ if (devc->transfer)
+ libusb_cancel_transfer(devc->transfer);
+}
+
+static int configure_channels(const struct sr_dev_inst *sdi)
+{
+ struct dev_context *devc;
+
+ devc = sdi->priv;
+ devc->cur_channels = 0;
+ devc->num_channels = 0;
+
+ for (GSList *l = sdi->channels; l; l = l->next) {
+ struct sr_channel *ch = (struct sr_channel*)l->data;
+ if (ch->enabled == FALSE)
+ continue;
+ devc->cur_channels |= 1 << (ch->index);
+ devc->num_channels++;
+ }
+
+ return SR_OK;
+}
+
+static int dev_acquisition_start(const struct sr_dev_inst *sdi)
+{
+ struct sr_dev_driver *di;
+ struct drv_context *drvc;
+ struct dev_context *devc;
+ int ret;
+
+ di = sdi->driver;
+ drvc = di->context;
+ devc = sdi->priv;
+
+ if (configure_channels(sdi) != SR_OK) {
+ sr_err("Failed to configure channels.");
+ return SR_ERR;
+ }
+
+ devc->convbuffer_size = 4 * 1024 * 1024;
+ if (!(devc->convbuffer = g_try_malloc(devc->convbuffer_size))) {
+ sr_err("Conversion buffer malloc failed.");
+ return SR_ERR_MALLOC;
+ }
+
+ if ((ret = la2016_setup_acquisition(sdi)) != SR_OK) {
+ g_free(devc->convbuffer);
+ devc->convbuffer = NULL;
+ return ret;
+ }
+
+ devc->ctx = drvc->sr_ctx;
+
+ if ((ret = la2016_start_acquisition(sdi)) != SR_OK) {
+ abort_acquisition(devc);
+ return ret;
+ }
+
+ devc->have_trigger = 0;
+ usb_source_add(sdi->session, drvc->sr_ctx, 50, handle_event, (void*)sdi);
+
+ std_session_send_df_header(sdi);
+
+ return SR_OK;
+}
+
+static int dev_acquisition_stop(struct sr_dev_inst *sdi)
+{
+ int ret;
+
+ ret = la2016_abort_acquisition(sdi);
+ abort_acquisition(sdi->priv);
+
+ return ret;
+}
+
+static struct sr_dev_driver kingst_la2016_driver_info = {
+ .name = "kingst-la2016",
+ .longname = "Kingst LA2016",
+ .api_version = 1,
+ .init = std_init,
+ .cleanup = std_cleanup,
+ .scan = scan,
+ .dev_list = std_dev_list,
+ .dev_clear = std_dev_clear,
+ .config_get = config_get,
+ .config_set = config_set,
+ .config_list = config_list,
+ .dev_open = dev_open,
+ .dev_close = dev_close,
+ .dev_acquisition_start = dev_acquisition_start,
+ .dev_acquisition_stop = dev_acquisition_stop,
+ .context = NULL,
+};
+SR_REGISTER_DEV_DRIVER(kingst_la2016_driver_info);
--- /dev/null
+/*
+ * This file is part of the libsigrok project.
+ *
+ * Copyright (C) 2020 Florian Schmidt <schmidt_florian@gmx.de>
+ * Copyright (C) 2013 Marcus Comstedt <marcus@mc.pp.se>
+ * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
+ * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <config.h>
+#include <stdint.h>
+#include <string.h>
+#include <glib.h>
+#include <glib/gstdio.h>
+#include <stdio.h>
+#include <errno.h>
+#include <math.h>
+#include <libsigrok/libsigrok.h>
+#include "libsigrok-internal.h"
+#include "protocol.h"
+
+#define FPGA_FIRMWARE "kingst-la2016a-fpga.bitstream"
+#define UC_FIRMWARE "kingst-la-%04x.fw"
+
+#define MAX_SAMPLE_RATE SR_MHZ(200)
+#define MAX_SAMPLE_DEPTH 10e9
+#define MAX_PWM_FREQ SR_MHZ(20)
+#define PWM_CLOCK SR_MHZ(200)
+
+/* registers for control request 32: */
+#define CTRL_RUN 0x00
+#define CTRL_PWM_EN 0x02
+#define CTRL_BULK 0x10 /* can be read to get 12 byte sampling_info (III) */
+#define CTRL_SAMPLING 0x20
+#define CTRL_TRIGGER 0x30
+#define CTRL_THRESHOLD 0x48
+#define CTRL_PWM1 0x70
+#define CTRL_PWM2 0x78
+
+static int ctrl_in(const struct sr_dev_inst *sdi,
+ uint8_t bRequest, uint16_t wValue, uint16_t wIndex,
+ void *data, uint16_t wLength)
+{
+ struct sr_usb_dev_inst *usb;
+ int ret;
+
+ usb = sdi->conn;
+
+ if ((ret = libusb_control_transfer(
+ usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_ENDPOINT_IN,
+ bRequest, wValue, wIndex, (unsigned char *)data, wLength,
+ DEFAULT_TIMEOUT_MS)) != wLength) {
+ sr_err("failed to read %d bytes via ctrl-in %d %#x, %d: %s.",
+ wLength, bRequest, wValue, wIndex,
+ libusb_error_name(ret));
+ return SR_ERR;
+ }
+
+ return SR_OK;
+}
+
+static int ctrl_out(const struct sr_dev_inst *sdi,
+ uint8_t bRequest, uint16_t wValue, uint16_t wIndex,
+ void *data, uint16_t wLength)
+{
+ struct sr_usb_dev_inst *usb;
+ int ret;
+
+ usb = sdi->conn;
+
+ if ((ret = libusb_control_transfer(
+ usb->devhdl, LIBUSB_REQUEST_TYPE_VENDOR | LIBUSB_ENDPOINT_OUT,
+ bRequest, wValue, wIndex, (unsigned char*)data, wLength,
+ DEFAULT_TIMEOUT_MS)) != wLength) {
+ sr_err("failed to write %d bytes via ctrl-out %d %#x, %d: %s.",
+ wLength, bRequest, wValue, wIndex,
+ libusb_error_name(ret));
+ return SR_ERR;
+ }
+
+ return SR_OK;
+}
+
+static int upload_fpga_bitstream(const struct sr_dev_inst *sdi)
+{
+ struct drv_context *drvc;
+ struct sr_usb_dev_inst *usb;
+ struct sr_resource bitstream;
+ uint32_t cmd;
+ uint8_t cmd_resp;
+ uint8_t block[4096];
+ int pos, len, act_len;
+ int ret;
+
+ drvc = sdi->driver->context;
+ usb = sdi->conn;
+
+ sr_info("Uploading FPGA bitstream '%s'.", FPGA_FIRMWARE);
+
+ ret = sr_resource_open(drvc->sr_ctx, &bitstream, SR_RESOURCE_FIRMWARE, FPGA_FIRMWARE);
+ if (ret != SR_OK) {
+ sr_err("could not find la2016 firmware %s!", FPGA_FIRMWARE);
+ return ret;
+ }
+
+ WL32(&cmd, 0x2b602);
+ if ((ret = ctrl_out(sdi, 80, 0x00, 0, &cmd, sizeof(cmd))) != SR_OK) {
+ sr_err("failed to give upload init command");
+ sr_resource_close(drvc->sr_ctx, &bitstream);
+ return ret;
+ }
+
+ pos = 0;
+ while (1) {
+ len = (int)sr_resource_read(drvc->sr_ctx, &bitstream, &block, sizeof(block));
+ if (len < 0) {
+ sr_err("failed to read from fpga bitstream!");
+ sr_resource_close(drvc->sr_ctx, &bitstream);
+ return SR_ERR;
+ }
+ if (len == 0)
+ break;
+
+ ret = libusb_bulk_transfer(usb->devhdl, 2, (unsigned char*)&block[0], len, &act_len, DEFAULT_TIMEOUT_MS);
+ if (ret != 0) {
+ sr_dbg("failed to write fpga bitstream block at %#x len %d: %s.", pos, (int)len, libusb_error_name(ret));
+ ret = SR_ERR;
+ break;
+ }
+ if (act_len != len) {
+ sr_dbg("failed to write fpga bitstream block at %#x len %d: act_len is %d.", pos, (int)len, act_len);
+ ret = SR_ERR;
+ break;
+ }
+ pos += len;
+ }
+ sr_resource_close(drvc->sr_ctx, &bitstream);
+ if (ret != 0)
+ return ret;
+ sr_info("FPGA bitstream upload (%d bytes) done.", pos);
+
+ if ((ret = ctrl_in(sdi, 80, 0x00, 0, &cmd_resp, sizeof(cmd_resp))) != SR_OK) {
+ sr_err("failed to read response after FPGA bitstream upload");
+ return ret;
+ }
+ if (cmd_resp != 0)
+ sr_warn("after fpga bitstream upload command response is 0x%02x, expect 0", cmd_resp);
+
+ if ((ret = ctrl_out(sdi, 16, 0x01, 0, NULL, 0)) != SR_OK) {
+ sr_err("failed enable fpga");
+ return ret;
+ }
+
+ return SR_OK;
+}
+
+static int set_threshold_voltage(const struct sr_dev_inst *sdi, float voltage)
+{
+ struct dev_context *devc;
+ float o1, o2, v1, v2, f;
+ uint32_t cfg;
+ int ret;
+
+ devc = sdi->priv;
+ o1 = 15859969; v1 = 0.45;
+ o2 = 15860333; v2 = 1.65;
+ f = (o2 - o1) / (v2 - v1);
+ WL32(&cfg, (uint32_t)(o1 + (voltage - v1) * f));
+
+ sr_dbg("set threshold voltage %.2fV", voltage);
+ ret = ctrl_out(sdi, 32, CTRL_THRESHOLD, 0, &cfg, sizeof(cfg));
+ if (ret != SR_OK) {
+ sr_err("error setting new threshold voltage of %.2fV (%d)", voltage, RL16(&cfg));
+ return ret;
+ }
+ devc->threshold_voltage = voltage;
+
+ return SR_OK;
+}
+
+static int enable_pwm(const struct sr_dev_inst *sdi, uint8_t p1, uint8_t p2)
+{
+ struct dev_context *devc;
+ uint8_t cfg;
+ int ret;
+
+ devc = sdi->priv;
+ cfg = 0;
+
+ if (p1) cfg |= 1 << 0;
+ if (p2) cfg |= 1 << 1;
+
+ sr_dbg("set pwm enable %d %d", p1, p2);
+ ret = ctrl_out(sdi, 32, CTRL_PWM_EN, 0, &cfg, sizeof(cfg));
+ if (ret != SR_OK) {
+ sr_err("error setting new pwm enable 0x%02x", cfg);
+ return ret;
+ }
+ devc->pwm_setting[0].enabled = (p1) ? 1 : 0;
+ devc->pwm_setting[1].enabled = (p2) ? 1 : 0;
+
+ return SR_OK;
+}
+
+static int set_pwm(const struct sr_dev_inst *sdi, uint8_t which, float freq, float duty)
+{
+ int CTRL_PWM[] = { CTRL_PWM1, CTRL_PWM2 };
+ struct dev_context *devc;
+ pwm_setting_dev_t cfg;
+ pwm_setting_t *setting;
+ int ret;
+
+ devc = sdi->priv;
+
+ if (which < 1 || which > 2) {
+ sr_err("invalid pwm channel: %d", which);
+ return SR_ERR;
+ }
+ if (freq > MAX_PWM_FREQ) {
+ sr_err("pwm frequency too high: %.1f", freq);
+ return SR_ERR;
+ }
+ if (duty > 100 || duty < 0) {
+ sr_err("invalid pwm percentage: %f", duty);
+ return SR_ERR;
+ }
+
+ cfg.period = (uint32_t)(PWM_CLOCK / freq);
+ cfg.duty = (uint32_t)(0.5f + (cfg.period * duty / 100.));
+ sr_dbg("set pwm%d period %d, duty %d", which, cfg.period, cfg.duty);
+
+ pwm_setting_dev_le(cfg);
+ ret = ctrl_out(sdi, 32, CTRL_PWM[which - 1], 0, &cfg, sizeof(cfg));
+ if (ret != SR_OK) {
+ sr_err("error setting new pwm%d config %d %d", which, cfg.period, cfg.duty);
+ return ret;
+ }
+ setting = &devc->pwm_setting[which - 1];
+ setting->freq = freq;
+ setting->duty = duty;
+ setting->dev = cfg;
+
+ return SR_OK;
+}
+
+static int set_defaults(const struct sr_dev_inst *sdi)
+{
+ struct dev_context *devc;
+ int ret;
+
+ devc = sdi->priv;
+
+ devc->capture_ratio = 5; /* percent */
+ devc->cur_channels = 0xffff;
+ devc->limit_samples = 5000000;
+ devc->cur_samplerate = 200000000;
+
+ ret = set_threshold_voltage(sdi, devc->threshold_voltage);
+ if (ret)
+ return ret;
+
+ ret = enable_pwm(sdi, 0, 0);
+ if (ret)
+ return ret;
+
+ ret = set_pwm(sdi, 1, 1e3, 50);
+ if (ret)
+ return ret;
+
+ ret = set_pwm(sdi, 2, 100e3, 50);
+ if (ret)
+ return ret;
+
+ ret = enable_pwm(sdi, 1, 1);
+ if (ret)
+ return ret;
+
+ return SR_OK;
+}
+
+static int set_trigger_config(const struct sr_dev_inst *sdi)
+{
+ struct dev_context *devc;
+ struct sr_trigger *trigger;
+ trigger_cfg_t cfg;
+ GSList *stages;
+ GSList *channel;
+ struct sr_trigger_stage *stage1;
+ struct sr_trigger_match *match;
+ uint16_t ch_mask;
+ int ret;
+
+ devc = sdi->priv;
+ trigger = sr_session_trigger_get(sdi->session);
+
+ memset(&cfg, 0, sizeof(cfg));
+
+ cfg.channels = devc->cur_channels;
+
+ if (trigger && trigger->stages) {
+ stages = trigger->stages;
+ stage1 = stages->data;
+ if (stages->next) {
+ sr_err("Only one trigger stage supported for now.");
+ return SR_ERR;
+ }
+ channel = stage1->matches;
+ while (channel) {
+ match = channel->data;
+ ch_mask = 1 << match->channel->index;
+
+ switch (match->match) {
+ case SR_TRIGGER_ZERO:
+ cfg.level |= ch_mask;
+ cfg.high_or_falling &= ~ch_mask;
+ break;
+ case SR_TRIGGER_ONE:
+ cfg.level |= ch_mask;
+ cfg.high_or_falling |= ch_mask;
+ break;
+ case SR_TRIGGER_RISING:
+ if ((cfg.enabled & ~cfg.level)) {
+ sr_err("Only one trigger signal with falling-/rising-edge allowed.");
+ return SR_ERR;
+ }
+ cfg.level &= ~ch_mask;
+ cfg.high_or_falling &= ~ch_mask;
+ break;
+ case SR_TRIGGER_FALLING:
+ if ((cfg.enabled & ~cfg.level)) {
+ sr_err("Only one trigger signal with falling-/rising-edge allowed.");
+ return SR_ERR;
+ }
+ cfg.level &= ~ch_mask;
+ cfg.high_or_falling |= ch_mask;
+ break;
+ default:
+ sr_err("Unknown trigger value.");
+ return SR_ERR;
+ }
+ cfg.enabled |= ch_mask;
+ channel = channel->next;
+ }
+ }
+ sr_dbg("set trigger configuration channels: 0x%04x, "
+ "trigger-enabled 0x%04x, level-triggered 0x%04x, "
+ "high/falling 0x%04x", cfg.channels, cfg.enabled, cfg.level,
+ cfg.high_or_falling);
+
+ devc->had_triggers_configured = cfg.enabled != 0;
+
+ trigger_cfg_le(cfg);
+ ret = ctrl_out(sdi, 32, CTRL_TRIGGER, 16, &cfg, sizeof(cfg));
+ if (ret != SR_OK) {
+ sr_err("error setting trigger config!");
+ return ret;
+ }
+
+ return SR_OK;
+}
+
+static int set_sample_config(const struct sr_dev_inst *sdi)
+{
+ struct dev_context *devc;
+ sample_config_t cfg;
+ double clock_divisor;
+ uint64_t psa;
+ uint64_t total;
+ int ret;
+
+ devc = sdi->priv;
+ total = 128 * 1024 * 1024;
+
+ if (devc->cur_samplerate > MAX_SAMPLE_RATE) {
+ sr_err("too high sample rate: %" PRIu64, devc->cur_samplerate);
+ return SR_ERR;
+ }
+
+ clock_divisor = MAX_SAMPLE_RATE / (double)devc->cur_samplerate;
+ if (clock_divisor > 0xffff)
+ clock_divisor = 0xffff;
+ cfg.clock_divisor = (uint16_t)(clock_divisor + 0.5);
+ devc->cur_samplerate = MAX_SAMPLE_RATE / cfg.clock_divisor;
+
+ if (devc->limit_samples > MAX_SAMPLE_DEPTH) {
+ sr_err("too high sample depth: %" PRIu64, devc->limit_samples);
+ return SR_ERR;
+ }
+ cfg.sample_depth = devc->limit_samples;
+
+ devc->pre_trigger_size = (devc->capture_ratio * devc->limit_samples) / 100;
+
+ psa = devc->pre_trigger_size * 256;
+ cfg.psa = (uint32_t)(psa & 0xffffffff);
+ cfg.u1 = (uint16_t)((psa >> 32) & 0xffff);
+ cfg.u2 = (uint32_t)((total * devc->capture_ratio) / 100);
+
+ sr_dbg("set sampling configuration %.0fkHz, %d samples, trigger-pos %d%%",
+ devc->cur_samplerate/1e3, (unsigned int)cfg.sample_depth, (unsigned int)devc->capture_ratio);
+
+ sample_config_le(cfg);
+ ret = ctrl_out(sdi, 32, CTRL_SAMPLING, 0, &cfg, sizeof(cfg));
+ if (ret != SR_OK) {
+ sr_err("error setting sample config!");
+ return ret;
+ }
+
+ return SR_OK;
+}
+
+/**
+ * lowest 2 bit are probably:
+ * 2: recording
+ * 1: finished
+ * next 2 bit indicate whether we are still waiting for triggering
+ * 0: waiting
+ * 3: triggered
+ */
+static uint16_t run_state(const struct sr_dev_inst *sdi)
+{
+ uint16_t state;
+ int ret;
+
+ if ((ret = ctrl_in(sdi, 32, CTRL_RUN, 0, &state, sizeof(state))) != SR_OK) {
+ sr_err("failed to read run state!");
+ return ret;
+ }
+ sr_dbg("run_state: 0x%04x", state);
+
+ return state;
+}
+
+static int set_run_mode(const struct sr_dev_inst *sdi, uint8_t fast_blinking)
+{
+ int ret;
+
+ if ((ret = ctrl_out(sdi, 32, CTRL_RUN, 0, &fast_blinking, sizeof(fast_blinking))) != SR_OK) {
+ sr_err("failed to send set-run-mode command %d", fast_blinking);
+ return ret;
+ }
+
+ return SR_OK;
+}
+
+static int get_capture_info(const struct sr_dev_inst *sdi)
+{
+ struct dev_context *devc;
+ int ret;
+
+ devc = sdi->priv;
+
+ if ((ret = ctrl_in(sdi, 32, CTRL_BULK, 0, &devc->info, sizeof(devc->info))) != SR_OK) {
+ sr_err("failed to read capture info!");
+ return ret;
+ }
+ capture_info_host(devc->info);
+
+ sr_dbg("capture info: n_rep_packets: 0x%08x/%d, before_trigger: 0x%08x/%d, write_pos: 0x%08x%d",
+ devc->info.n_rep_packets, devc->info.n_rep_packets,
+ devc->info.n_rep_packets_before_trigger, devc->info.n_rep_packets_before_trigger,
+ devc->info.write_pos, devc->info.write_pos);
+
+ if (devc->info.n_rep_packets % 5)
+ sr_warn("number of packets is not as expected multiples of 5: %d", devc->info.n_rep_packets);
+
+ return SR_OK;
+}
+
+SR_PRIV int la2016_upload_firmware(struct sr_context *sr_ctx, libusb_device *dev, uint16_t product_id)
+{
+ char fw_file[1024];
+ snprintf(fw_file, sizeof(fw_file) - 1, UC_FIRMWARE, product_id);
+ return ezusb_upload_firmware(sr_ctx, dev, 0, fw_file);
+}
+
+SR_PRIV int la2016_setup_acquisition(const struct sr_dev_inst *sdi)
+{
+ struct dev_context *devc;
+ int ret;
+ uint8_t cmd;
+
+ devc = sdi->priv;
+
+ ret = set_threshold_voltage(sdi, devc->threshold_voltage);
+ if (ret != SR_OK)
+ return ret;
+
+ cmd = 0;
+ if ((ret = ctrl_out(sdi, 32, 0x03, 0, &cmd, sizeof(cmd))) != SR_OK) {
+ sr_err("failed to send stop sampling command");
+ return ret;
+ }
+
+ ret = set_trigger_config(sdi);
+ if (ret != SR_OK)
+ return ret;
+
+ ret = set_sample_config(sdi);
+ if (ret != SR_OK)
+ return ret;
+
+ return SR_OK;
+}
+
+SR_PRIV int la2016_start_acquisition(const struct sr_dev_inst *sdi)
+{
+ return set_run_mode(sdi, 3);
+}
+
+SR_PRIV int la2016_stop_acquisition(const struct sr_dev_inst *sdi)
+{
+ return set_run_mode(sdi, 0);
+}
+
+SR_PRIV int la2016_abort_acquisition(const struct sr_dev_inst *sdi)
+{
+ return la2016_stop_acquisition(sdi);
+}
+
+SR_PRIV int la2016_has_triggered(const struct sr_dev_inst *sdi)
+{
+ uint16_t state;
+
+ state = run_state(sdi);
+
+ return (state & 0x3) == 1;
+}
+
+SR_PRIV int la2016_start_retrieval(const struct sr_dev_inst *sdi, libusb_transfer_cb_fn cb)
+{
+ struct dev_context *devc;
+ struct sr_usb_dev_inst *usb;
+ int ret;
+ uint32_t bulk_cfg[2];
+ uint32_t to_read;
+ uint8_t *buffer;
+
+ devc = sdi->priv;
+ usb = sdi->conn;
+
+ if ((ret = get_capture_info(sdi)) != SR_OK)
+ return ret;
+
+ devc->n_transfer_packets_to_read = devc->info.n_rep_packets / 5;
+ devc->n_bytes_to_read = devc->n_transfer_packets_to_read * sizeof(transfer_packet_t);
+ devc->read_pos = devc->info.write_pos - devc->n_bytes_to_read;
+ devc->n_reps_until_trigger = devc->info.n_rep_packets_before_trigger;
+
+ sr_dbg("want to read %d tfer-packets starting from pos %d",
+ devc->n_transfer_packets_to_read, devc->read_pos);
+
+ if ((ret = ctrl_out(sdi, 56, 0x00, 0, NULL, 0)) != SR_OK) {
+ sr_err("failed to reset bulk state");
+ return ret;
+ }
+ WL32(&bulk_cfg[0], devc->read_pos);
+ WL32(&bulk_cfg[1], devc->n_bytes_to_read);
+ sr_dbg("will read from 0x%08x, 0x%08x bytes", devc->read_pos, devc->n_bytes_to_read);
+ if ((ret = ctrl_out(sdi, 32, CTRL_BULK, 0, &bulk_cfg, sizeof(bulk_cfg))) != SR_OK) {
+ sr_err("failed to send bulk config");
+ return ret;
+ }
+ if ((ret = ctrl_out(sdi, 48, 0x00, 0, NULL, 0)) != SR_OK) {
+ sr_err("failed to unblock bulk transfers");
+ return ret;
+ }
+
+ to_read = devc->n_bytes_to_read;
+ if (to_read > LA2016_BULK_MAX)
+ to_read = LA2016_BULK_MAX;
+
+ buffer = g_try_malloc(to_read);
+ if (!buffer) {
+ sr_err("Failed to allocate %d bytes for bulk transfer", to_read);
+ return SR_ERR_MALLOC;
+ }
+
+ devc->transfer = libusb_alloc_transfer(0);
+ libusb_fill_bulk_transfer(
+ devc->transfer, usb->devhdl,
+ 0x86, buffer, to_read,
+ cb, (void *)sdi, DEFAULT_TIMEOUT_MS);
+
+ if ((ret = libusb_submit_transfer(devc->transfer)) != 0) {
+ sr_err("Failed to submit transfer: %s.", libusb_error_name(ret));
+ libusb_free_transfer(devc->transfer);
+ devc->transfer = NULL;
+ g_free(buffer);
+ return SR_ERR;
+ }
+
+ return SR_OK;
+}
+
+SR_PRIV int la2016_init_device(const struct sr_dev_inst *sdi)
+{
+ int ret;
+ uint32_t i1;
+ uint32_t i2[2];
+ uint16_t state;
+
+ uint8_t unknown_cmd1[] = { 0xa3, 0x09, 0xc9, 0x8d, 0xe7, 0xad, 0x7a, 0x62, 0xb6, 0xd1, 0xbf };
+ uint8_t expected_unknown_resp1[] = { 0xa3, 0x10, 0xda, 0x66, 0x6b, 0x93, 0x5c, 0x55, 0x38, 0x50, 0x39, 0x51, 0x98, 0x86, 0x5d, 0x06, 0x7c, 0xea };
+ uint8_t unknown_resp1[sizeof(expected_unknown_resp1)];
+
+ uint8_t unknown_cmd2[] = { 0xa3, 0x01, 0xca };
+ uint8_t expected_unknown_resp2[] = { 0xa3, 0x08, 0x06, 0x83, 0x96, 0x29, 0x15, 0xe1, 0x92, 0x74, 0x00, 0x00 };
+ uint8_t unknown_resp2[sizeof(expected_unknown_resp2)];
+
+ if ((ret = ctrl_in(sdi, 162, 0x20, 0, &i1, sizeof(i1))) != SR_OK) {
+ sr_err("failed to read i1");
+ return ret;
+ }
+ sr_dbg("i1: 0x%08x", i1);
+
+ if ((ret = ctrl_in(sdi, 162, 0x08, 0, &i2, sizeof(i2))) != SR_OK) {
+ sr_err("failed to read i2");
+ return ret;
+ }
+ sr_dbg("i2: 0x%08x, 0x%08x", i2[0], i2[1]);
+
+ if ((ret = upload_fpga_bitstream(sdi)) != SR_OK) {
+ sr_err("failed to upload fpga bitstream");
+ return ret;
+ }
+
+ run_state(sdi);
+
+ if ((ret = ctrl_out(sdi, 96, 0x00, 0, unknown_cmd1, sizeof(unknown_cmd1))) != SR_OK) {
+ sr_err("failed to send unknown_cmd1");
+ return ret;
+ }
+ g_usleep(80 * 1000);
+ if ((ret = ctrl_in(sdi, 96, 0x00, 0, unknown_resp1, sizeof(unknown_resp1))) != SR_OK) {
+ sr_err("failed to read unknown_resp1");
+ return ret;
+ }
+ if (memcmp(unknown_resp1, expected_unknown_resp1, sizeof(unknown_resp1)))
+ sr_dbg("unknown_cmd1 response is not as expected!");
+
+ state = run_state(sdi);
+ if (state != 0x85e9)
+ sr_warn("expect run state to be 0x85e9, but it reads 0x%04x", state);
+
+ if ((ret = ctrl_out(sdi, 96, 0x00, 0, unknown_cmd2, sizeof(unknown_cmd2))) != SR_OK) {
+ sr_err("failed to send unknown_cmd2");
+ return ret;
+ }
+ g_usleep(80 * 1000);
+ if ((ret = ctrl_in(sdi, 96, 0x00, 0, unknown_resp2, sizeof(unknown_resp2))) != SR_OK) {
+ sr_err("failed to read unknown_resp2");
+ return ret;
+ }
+ if (memcmp(unknown_resp2, expected_unknown_resp2, sizeof(unknown_resp2)))
+ sr_dbg("unknown_cmd2 response is not as expected!");
+
+ if ((ret = ctrl_out(sdi, 56, 0x00, 0, NULL, 0)) != SR_OK) {
+ sr_err("failed to send unknown_cmd3");
+ return ret;
+ }
+ sr_dbg("device should be initialized");
+
+ return set_defaults(sdi);
+}
+
+SR_PRIV int la2016_deinit_device(const struct sr_dev_inst *sdi)
+{
+ int ret;
+
+ if ((ret = ctrl_out(sdi, 16, 0x00, 0, NULL, 0)) != SR_OK) {
+ sr_err("failed to send deinit command");
+ return ret;
+ }
+
+ return SR_OK;
+}
--- /dev/null
+/*
+ * This file is part of the libsigrok project.
+ *
+ * Copyright (C) 2020 Florian Schmidt <schmidt_florian@gmx.de>
+ * Copyright (C) 2013 Marcus Comstedt <marcus@mc.pp.se>
+ * Copyright (C) 2013 Bert Vermeulen <bert@biot.com>
+ * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation, either version 3 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef LIBSIGROK_HARDWARE_KINGST_LA2016_PROTOCOL_H
+#define LIBSIGROK_HARDWARE_KINGST_LA2016_PROTOCOL_H
+
+#include <stdint.h>
+#include <glib.h>
+#include <libsigrok/libsigrok.h>
+#include "libsigrok-internal.h"
+
+#define LOG_PREFIX "kingst-la2016"
+
+/* device is little endian */
+
+#define LA2016_VID 0x77a1
+#define LA2016_PID 0x01a2
+#define USB_INTERFACE 0
+
+#define LA2016_BULK_MAX 8388608
+
+#define MAX_RENUM_DELAY_MS 3000
+#define DEFAULT_TIMEOUT_MS 200
+
+#define LA2016_THR_VOLTAGE_MIN 0.40
+#define LA2016_THR_VOLTAGE_MAX 4.00
+
+#define LA2016_NUM_SAMPLES_MIN 256
+#define LA2016_NUM_SAMPLES_MAX (10UL * 1000 * 1000 * 1000)
+
+typedef struct pwm_setting_dev {
+ uint32_t period;
+ uint32_t duty;
+} __attribute__((__packed__)) pwm_setting_dev_t;
+
+typedef struct trigger_cfg {
+ uint32_t channels;
+ uint32_t enabled;
+ uint32_t level;
+ uint32_t high_or_falling;
+} __attribute__((__packed__)) trigger_cfg_t;
+
+typedef struct sample_config {
+ uint32_t sample_depth;
+ uint32_t psa;
+ uint16_t u1;
+ uint32_t u2;
+ uint16_t clock_divisor;
+} __attribute__((__packed__)) sample_config_t;
+
+typedef struct capture_info {
+ uint32_t n_rep_packets;
+ uint32_t n_rep_packets_before_trigger;
+ uint32_t write_pos;
+} __attribute__((__packed__)) capture_info_t;
+
+typedef struct acq_packet {
+ uint16_t state;
+ uint8_t repetitions;
+} __attribute__((__packed__)) acq_packet_t;
+
+typedef struct transfer_packet {
+ acq_packet_t packet[5];
+ uint8_t seq;
+} __attribute__((__packed__)) transfer_packet_t;
+
+typedef struct pwm_setting {
+ uint8_t enabled;
+ float freq;
+ float duty;
+ pwm_setting_dev_t dev;
+} pwm_setting_t;
+
+struct dev_context {
+ struct sr_context *ctx;
+
+ int64_t fw_updated;
+ pwm_setting_t pwm_setting[2];
+ unsigned int threshold_voltage_idx;
+ float threshold_voltage;
+ uint64_t cur_samplerate;
+ uint64_t limit_samples;
+ uint64_t capture_ratio;
+ uint16_t cur_channels;
+ int num_channels;
+
+ /* derived stuff */
+ uint64_t pre_trigger_size;
+
+ /* state after sampling */
+ int had_triggers_configured;
+ int have_trigger;
+ int transfer_finished;
+ capture_info_t info;
+ unsigned int n_transfer_packets_to_read; /* each with 5 acq packets */
+ unsigned int n_bytes_to_read;
+ unsigned int n_reps_until_trigger;
+ unsigned int reading_behind_trigger;
+ uint64_t total_samples;
+ uint32_t read_pos;
+
+ unsigned int convbuffer_size;
+ uint8_t *convbuffer;
+ struct libusb_transfer *transfer;
+};
+
+SR_PRIV int la2016_upload_firmware(struct sr_context *sr_ctx, libusb_device *dev, uint16_t product_id);
+SR_PRIV int la2016_setup_acquisition(const struct sr_dev_inst *sdi);
+SR_PRIV int la2016_start_acquisition(const struct sr_dev_inst *sdi);
+SR_PRIV int la2016_stop_acquisition(const struct sr_dev_inst *sdi);
+SR_PRIV int la2016_abort_acquisition(const struct sr_dev_inst *sdi);
+SR_PRIV int la2016_has_triggered(const struct sr_dev_inst *sdi);
+SR_PRIV int la2016_start_retrieval(const struct sr_dev_inst *sdi, libusb_transfer_cb_fn cb);
+SR_PRIV int la2016_init_device(const struct sr_dev_inst *sdi);
+SR_PRIV int la2016_deinit_device(const struct sr_dev_inst *sdi);
+
+#ifndef WORDS_BIGENDIAN
+/* this host is big-endian, need to swap from/to device inplace */
+#define inplace_WL32(obj) do { uint32_t tmp = obj; WL32(&(obj), tmp); } while (0)
+#define inplace_RL32(obj) obj = RL32(&(obj))
+#define inplace_WL16(obj) do { uint16_t tmp = obj; WL16(&(obj), tmp); } while (0)
+#define inplace_RL16(obj) obj = RL16(&(obj))
+
+#define pwm_setting_dev_le(obj) do { \
+ inplace_WL32((obj).period); \
+ inplace_WL32((obj).duty); \
+ } while (0)
+#define trigger_cfg_le(obj) do { \
+ inplace_WL32((obj).channels); \
+ inplace_WL32((obj).enabled); \
+ inplace_WL32((obj).level); \
+ inplace_WL32((obj).high_or_falling); \
+ } while (0)
+#define sample_config_le(obj) do { \
+ inplace_WL32((obj).sample_depth); \
+ inplace_WL32((obj).psa); \
+ inplace_WL16((obj).u1); \
+ inplace_WL32((obj).u2); \
+ inplace_WL16((obj).clock_divisor); \
+ } while (0)
+
+#define capture_info_host(obj) do { \
+ inplace_RL32((obj).n_rep_packets); \
+ inplace_RL32((obj).n_rep_packets_before_trigger); \
+ inplace_RL32((obj).write_pos); \
+ } while (0)
+#define acq_packet_host(obj) \
+ inplace_RL16((obj).state)
+#define transfer_packet_host(obj) do { \
+ acq_packet_host((obj).packet[0]); \
+ acq_packet_host((obj).packet[1]); \
+ acq_packet_host((obj).packet[2]); \
+ acq_packet_host((obj).packet[3]); \
+ acq_packet_host((obj).packet[4]); \
+ } while (0)
+
+#else
+/* this host is little-endian, same as device */
+#define pwm_setting_dev_le(obj) (void)obj
+#define trigger_cfg_le(obj) (void)obj
+#define sample_config_le(obj) (void)obj
+
+#define capture_info_host(obj) (void)obj
+#define acq_packet_host(obj) (void)obj
+#define transfer_packet_host(obj) (void)obj
+#endif
+
+#endif
projects / libsigrok.git / commitdiff