# This decoder extracts a DDC stream from an I2C session between a computer
# and a display device. The stream is output as plain bytes.
#
+# Details:
+# https://en.wikipedia.org/wiki/Display_Data_Channel
+#
import sigrokdecode as srd
-
class Decoder(srd.Decoder):
id = 'ddc'
name = 'DDC'
longname = 'Display Data Channel'
- desc = 'DDC is a protocol for communication between computers and displays.'
+ desc = 'A protocol for communication between computers and displays.'
longdesc = ''
author = 'Bert Vermeulen <bert@biot.com>'
license = 'gplv3+'
inputs = ['i2c']
outputs = ['ddc']
annotations = [
- ["Byte stream", "DDC byte stream as read from display."],
+ ['Byte stream', 'DDC byte stream as read from display.'],
]
def __init__(self, **kwargs):
try:
cmd, data, ack_bit = i2c_data
except Exception as e:
- raise Exception("malformed I2C input: %s" % str(e)) from e
+ raise Exception('malformed I2C input: %s' % str(e)) from e
if self.state is None:
- # waiting for the DDC session to start
+ # Wait for the DDC session to start.
if cmd in ('START', 'START_REPEAT'):
self.state = 'start'
elif self.state == 'start':
# so this marks the start of the DDC data transfer.
self.state = 'transfer'
elif cmd == 'STOP':
- # back to idle
+ # Got back to the idle state.
self.state = None
elif self.state == 'transfer':
if cmd == 'DATA_READ':
- # there shouldn't be anything but data reads on this
- # address, so ignore everything else
+ # There shouldn't be anything but data reads on this
+ # address, so ignore everything else.
self.put(start_sample, end_sample, self.out_ann,
- [0, ["0x%.2x" % data]])
+ [0, ['0x%.2x' % data]])
# The protocol output consists of a (Python) list of I2C "packets", each of
# which is of the form
#
-# [ _i2c_command_, _data_, _ack_bit_ ]
+# [<i2c_command>, <data>, <ack_bit>]
#
-# _i2c_command_ is one of:
+# <i2c_command> is one of:
# - 'START' (START condition)
# - 'START_REPEAT' (Repeated START)
-# - 'ADDRESS_READ' (Address, read)
-# - 'ADDRESS_WRITE' (Address, write)
+# - 'ADDRESS_READ' (Slave address, read)
+# - 'ADDRESS_WRITE' (Slave address, write)
# - 'DATA_READ' (Data, read)
# - 'DATA_WRITE' (Data, write)
# - 'STOP' (STOP condition)
#
-# _data_ is the data or address byte associated with the ADDRESS_* and DATA_*
+# <data> is the data or address byte associated with the ADDRESS_* and DATA_*
# command. For START, START_REPEAT and STOP, this is None.
#
-# _ack_bit_ is either 'ACK' or 'NACK', but may also be None.
-#
+# <ack_bit> is either 'ACK' or 'NACK', but may also be None.
#
import sigrokdecode as srd
-# annotation feed formats
+# Annotation feed formats
ANN_SHIFTED = 0
ANN_SHIFTED_SHORT = 1
ANN_RAW = 2
-# values are verbose and short annotation, respectively
+# Values are verbose and short annotation, respectively.
protocol = {
- 'START': ['START', 'S'],
- 'START_REPEAT': ['START REPEAT', 'Sr'],
- 'STOP': ['STOP', 'P'],
- 'ACK': ['ACK', 'A'],
- 'NACK': ['NACK', 'N'],
- 'ADDRESS_READ': ['ADDRESS READ', 'AR'],
- 'ADDRESS_WRITE': ['ADDRESS WRITE','AW'],
- 'DATA_READ': ['DATA READ', 'DR'],
- 'DATA_WRITE': ['DATA WRITE', 'DW'],
+ 'START': ['START', 'S'],
+ 'START_REPEAT': ['START REPEAT', 'Sr'],
+ 'STOP': ['STOP', 'P'],
+ 'ACK': ['ACK', 'A'],
+ 'NACK': ['NACK', 'N'],
+ 'ADDRESS_READ': ['ADDRESS READ', 'AR'],
+ 'ADDRESS_WRITE': ['ADDRESS WRITE', 'AW'],
+ 'DATA_READ': ['DATA READ', 'DR'],
+ 'DATA_WRITE': ['DATA WRITE', 'DW'],
}
# States
FIND_ADDRESS = 1
FIND_DATA = 2
-
class Decoder(srd.Decoder):
id = 'i2c'
name = 'I2C'
}
annotations = [
# ANN_SHIFTED
- ["7-bit shifted hex",
- "Read/Write bit shifted out from the 8-bit i2c slave address"],
+ ['7-bit shifted hex',
+ 'Read/write bit shifted out from the 8-bit I2C slave address'],
# ANN_SHIFTED_SHORT
- ["7-bit shifted hex (short)",
- "Read/Write bit shifted out from the 8-bit i2c slave address"],
+ ['7-bit shifted hex (short)',
+ 'Read/write bit shifted out from the 8-bit I2C slave address'],
# ANN_RAW
- ["Raw hex", "Unaltered raw data"]
+ ['Raw hex', 'Unaltered raw data'],
]
def __init__(self, **kwargs):
pass
def is_start_condition(self, scl, sda):
- """START condition (S): SDA = falling, SCL = high"""
+ # START condition (S): SDA = falling, SCL = high
if (self.oldsda == 1 and sda == 0) and scl == 1:
return True
return False
def is_data_bit(self, scl, sda):
- """Data sampling of receiver: SCL = rising"""
+ # Data sampling of receiver: SCL = rising
if self.oldscl == 0 and scl == 1:
return True
return False
def is_stop_condition(self, scl, sda):
- """STOP condition (P): SDA = rising, SCL = high"""
+ # STOP condition (P): SDA = rising, SCL = high
if (self.oldsda == 0 and sda == 1) and scl == 1:
return True
return False
cmd = 'START_REPEAT'
else:
cmd = 'START'
- self.put(self.out_proto, [ cmd, None, None ])
- self.put(self.out_ann, [ ANN_SHIFTED, [protocol[cmd][0]] ])
- self.put(self.out_ann, [ ANN_SHIFTED_SHORT, [protocol[cmd][1]] ])
+
+ self.put(self.out_proto, [cmd, None, None])
+ self.put(self.out_ann, [ANN_SHIFTED, [protocol[cmd][0]]])
+ self.put(self.out_ann, [ANN_SHIFTED_SHORT, [protocol[cmd][1]]])
self.state = FIND_ADDRESS
self.bitcount = self.databyte = 0
self.wr = -1
def found_address_or_data(self, scl, sda):
- """Gather 8 bits of data plus the ACK/NACK bit."""
+ # Gather 8 bits of data plus the ACK/NACK bit.
if self.startsample == -1:
- # TODO: should be samplenum, as received from the feed
+ # TODO: Should be samplenum, as received from the feed.
self.startsample = self.samplecnt
self.bitcount += 1
# Return if we haven't collected all 8 + 1 bits, yet.
if self.bitcount != 9:
- return []
+ return
- # send raw output annotation before we start shifting out
- # read/write and ack/nack bits
- self.put(self.out_ann, [ANN_RAW, ["0x%.2x" % self.databyte]])
+ # Send raw output annotation before we start shifting out
+ # read/write and ack/nack bits.
+ self.put(self.out_ann, [ANN_RAW, ['0x%.2x' % self.databyte]])
# We received 8 address/data bits and the ACK/NACK bit.
self.databyte >>= 1 # Shift out unwanted ACK/NACK bit here.
# TODO: Error?
pass
- # last bit that came in was the ACK/NACK bit (1 = NACK)
+ # Last bit that came in was the ACK/NACK bit (1 = NACK).
if sda == 1:
ack_bit = 'NACK'
else:
ack_bit = 'ACK'
- # TODO: Simplify.
if self.state == FIND_ADDRESS and self.wr == 1:
cmd = 'ADDRESS_WRITE'
elif self.state == FIND_ADDRESS and self.wr == 0:
cmd = 'DATA_WRITE'
elif self.state == FIND_DATA and self.wr == 0:
cmd = 'DATA_READ'
- self.put(self.out_proto, [ cmd, d, ack_bit ] )
+
+ self.put(self.out_proto, [cmd, d, ack_bit])
self.put(self.out_ann, [ANN_SHIFTED, [
- "%s" % protocol[cmd][0],
- "0x%02x" % d,
- "%s" % protocol[ack_bit][0]]
- ] )
+ '%s' % protocol[cmd][0],
+ '0x%02x' % d,
+ '%s' % protocol[ack_bit][0]]
+ ])
self.put(self.out_ann, [ANN_SHIFTED_SHORT, [
- "%s" % protocol[cmd][1],
- "0x%02x" % d,
- "%s" % protocol[ack_bit][1]]
- ] )
+ '%s' % protocol[cmd][1],
+ '0x%02x' % d,
+ '%s' % protocol[ack_bit][1]]
+ ])
self.bitcount = self.databyte = 0
self.startsample = -1
pass
def found_stop(self, scl, sda):
- self.put(self.out_proto, [ 'STOP', None, None ])
- self.put(self.out_ann, [ ANN_SHIFTED, [protocol['STOP'][0]] ])
- self.put(self.out_ann, [ ANN_SHIFTED_SHORT, [protocol['STOP'][1]] ])
+ self.put(self.out_proto, ['STOP', None, None])
+ self.put(self.out_ann, [ANN_SHIFTED, [protocol['STOP'][0]]])
+ self.put(self.out_ann, [ANN_SHIFTED_SHORT, [protocol['STOP'][1]]])
self.state = FIND_START
self.is_repeat_start = 0
self.wr = -1
def put(self, output_id, data):
- # inject sample range into the call up to sigrok
- # TODO: 0-0 sample range for now
+ # Inject sample range into the call up to sigrok.
+ # TODO: 0-0 sample range for now.
super(Decoder, self).put(0, 0, output_id, data)
def decode(self, timeoffset, duration, data):
}
def bitstr_to_num(bitstr):
- if not bitstr: return 0
+ if not bitstr:
+ return 0
l = list(bitstr)
l.reverse()
return int(''.join(l), 2)
def packet_decode(packet):
pids = {
- '10000111':'OUT', # Tokens
- '10010110':'IN',
- '10100101':'SOF',
- '10110100':'SETUP',
- '11000011':'DATA0', # Data
- '11010010':'DATA1',
- '01001011':'ACK', # Handshake
- '01011010':'NAK',
- '01111000':'STALL',
- '01101001':'NYET',
+ '10000111': 'OUT', # Tokens
+ '10010110': 'IN',
+ '10100101': 'SOF',
+ '10110100': 'SETUP',
+ '11000011': 'DATA0', # Data
+ '11010010': 'DATA1',
+ '01001011': 'ACK', # Handshake
+ '01011010': 'NAK',
+ '01111000': 'STALL',
+ '01101001': 'NYET',
}
sync = packet[:8]
pid = packet[8:16]
pid = pids.get(pid, pid)
+
# Remove CRC.
if pid in ('OUT', 'IN', 'SOF', 'SETUP'):
data = packet[16:-5]
else:
dev = bitstr_to_num(data[:7])
ep = bitstr_to_num(data[7:])
- data = "DEV %d EP %d" % (dev, ep)
+ data = 'DEV %d EP %d' % (dev, ep)
elif pid in ('DATA0', 'DATA1'):
data = packet[16:-16]
- tmp = ""
+ tmp = ''
while data:
- tmp += "%02X " % bitstr_to_num(data[:8])
+ tmp += '%02X ' % bitstr_to_num(data[:8])
data = data[8:]
data = tmp
else:
data = packet[16:]
- if sync != "00000001":
- return "SYNC INVALID!"
+ if sync != '00000001':
+ return 'SYNC INVALID!'
return pid + ' ' + data
license = 'gplv2+'
inputs = ['logic']
outputs = ['usb']
- # Probe names with a set of defaults
probes = [
{'id': 'dp', 'name': 'D+', 'desc': 'USB D+ signal'},
{'id': 'dm', 'name': 'D-', 'desc': 'USB D- signal'},
# self.out_proto = self.add(srd.OUTPUT_PROTO, 'usb')
self.out_ann = self.add(srd.OUTPUT_ANN, 'usb')
if self.rate < 48000000:
- raise Exception("Sample rate not sufficient for USB decoding")
+ raise Exception('Sample rate not sufficient for USB decoding')
# Initialise decoder state.
self.sym = J
self.scount = 0
if self.sym == SE0:
if bitcount == 1:
# End-Of-Packet (EOP)
- out += [{"type":"usb", "data":self.packet,
- "display":packet_decode(self.packet)}]
+ out += [{'type': 'usb', 'data': self.packet,
+ 'display': packet_decode(self.packet)}]
else:
# Longer than EOP, assume reset.
- out += [{"type":"usb", "display":"RESET"}]
+ out += [{'type': 'usb', 'display': 'RESET'}]
self.scount = 0
self.sym = sym
self.packet = ''
if bitcount < 6 and sym != SE0:
self.packet += '0'
elif bitcount > 6:
- out += [{"type":"usb", "display":"BIT STUFF ERROR"}]
+ out += [{'type': 'usb', 'display': 'BIT STUFF ERROR'}]
self.scount = 0
self.sym = sym
projects / libsigrokdecode.git / commitdiff