SR_CONF_TRIGGER_MATCH | SR_CONF_LIST,
SR_CONF_CAPTURE_RATIO | SR_CONF_GET | SR_CONF_SET,
SR_CONF_EXTERNAL_CLOCK | SR_CONF_GET | SR_CONF_SET,
+ SR_CONF_CLOCK_EDGE | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST
};
static const int32_t soft_trigger_matches[] = {
SR_TRIGGER_EDGE,
};
+/* Names assigned to available edge slope choices.
+ */
+static const char *const signal_edge_names[] = {
+ [DS_EDGE_RISING] = "rising",
+ [DS_EDGE_FALLING] = "falling",
+};
+
static const struct {
int range;
gdouble low;
case SR_CONF_CONTINUOUS:
*data = g_variant_new_boolean(devc->dslogic_continuous_mode);
break;
+ case SR_CONF_CLOCK_EDGE:
+ i = devc->dslogic_clock_edge;
+ if (i >= ARRAY_SIZE(signal_edge_names))
+ return SR_ERR_BUG;
+ *data = g_variant_new_string(signal_edge_names[0]);//idx]);
+ break;
default:
return SR_ERR_NA;
}
return SR_OK;
}
+
+/* Helper for mapping a string-typed configuration value to an index
+ * within a table of possible values.
+ */
+static int lookup_index(GVariant *value, const char *const *table, int len)
+{
+ const char *entry;
+ int i;
+
+ entry = g_variant_get_string(value, NULL);
+ if (!entry)
+ return -1;
+
+ /* Linear search is fine for very small tables. */
+ for (i = 0; i < len; i++) {
+ if (strcmp(entry, table[i]) == 0)
+ return i;
+ }
+
+ return -1;
+}
+
static int config_set(uint32_t key, GVariant *data, const struct sr_dev_inst *sdi,
const struct sr_channel_group *cg)
{
case SR_CONF_CONTINUOUS:
devc->dslogic_continuous_mode = g_variant_get_boolean(data);
break;
+ case SR_CONF_CLOCK_EDGE:
+ i = lookup_index(data, signal_edge_names,
+ ARRAY_SIZE(signal_edge_names));
+ if (i < 0)
+ return SR_ERR_ARG;
+ devc->dslogic_clock_edge = i;
+ break;
default:
ret = SR_ERR_NA;
}
soft_trigger_matches, ARRAY_SIZE(soft_trigger_matches),
sizeof(int32_t));
break;
+ case SR_CONF_CLOCK_EDGE:
+ *data = g_variant_new_strv(signal_edge_names,
+ ARRAY_SIZE(signal_edge_names));
+ break;
default:
return SR_ERR_NA;
}
* 6 1 = samplerate 400MHz
* 5 1 = samplerate 200MHz or analog mode
* 4 0 = logic, 1 = dso or analog
- * 2-3 unused
- * 1 0 = internal clock, 1 = external clock
+ * 3 unused
+ * 1-2 00 = internal clock,
+ * 01 = external clock rising,
+ * 11 = external clock falling
* 0 1 = trigger enabled
*/
v16 = 0x0000;
v16 = 1 << 13;
if (devc->dslogic_continuous_mode)
v16 |= 1 << 12;
- if (devc->dslogic_external_clock)
+ if (devc->dslogic_external_clock){
v16 |= 1 << 1;
+ if (devc->dslogic_clock_edge == DS_EDGE_FALLING){
+ v16 |= 1 << 2;
+ }
+ }
WL16(&cfg.mode, v16);
v32 = ceil(SR_MHZ(100) * 1.0 / devc->cur_samplerate);