static const uint32_t devopts_cg[] = {
SR_CONF_VDIV | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
+ SR_CONF_COUPLING | SR_CONF_GET | SR_CONF_SET | SR_CONF_LIST,
};
static const char *channel_names[] = {
"CH1", "CH2",
};
+static const char *coupling[] = {
+ "AC", "DC",
+};
+
static const struct hantek_6xxx_profile dev_profiles[] = {
{
0x04b4, 0x6022, 0x04b5, 0x6022,
for (i = 0; i < NUM_CHANNELS; i++) {
devc->ch_enabled[i] = TRUE;
devc->voltage[i] = DEFAULT_VOLTAGE;
+ devc->coupling[i] = DEFAULT_COUPLING;
}
devc->sample_buf = NULL;
vdiv = vdivs[devc->voltage[ch_idx]];
*data = g_variant_new("(tt)", vdiv[0], vdiv[1]);
break;
+ case SR_CONF_COUPLING:
+ *data = g_variant_new_string(coupling[devc->coupling[ch_idx]]);
+ break;
}
}
uint64_t p, q;
int tmp_int, ch_idx, ret;
unsigned int i;
+ const char *tmp_str;
if (sdi->status != SR_ST_ACTIVE)
return SR_ERR_DEV_CLOSED;
} else
ret = SR_ERR_ARG;
break;
+ case SR_CONF_COUPLING:
+ tmp_str = g_variant_get_string(data, NULL);
+ for (i = 0; coupling[i]; i++) {
+ if (!strcmp(tmp_str, coupling[i])) {
+ devc->coupling[ch_idx] = i;
+ break;
+ }
+ }
+ if (coupling[i] == 0)
+ ret = SR_ERR_ARG;
+ break;
default:
ret = SR_ERR_NA;
break;
*data = g_variant_new_fixed_array(G_VARIANT_TYPE_UINT32,
devopts_cg, ARRAY_SIZE(devopts_cg), sizeof(uint32_t));
break;
+ case SR_CONF_COUPLING:
+ *data = g_variant_new_strv(coupling, ARRAY_SIZE(coupling));
+ break;
case SR_CONF_VDIV:
g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY);
for (i = 0; i < ARRAY_SIZE(vdivs); i++) {
return MIN(ret1, ret2);
}
+SR_PRIV int hantek_6xxx_update_coupling(const struct sr_dev_inst *sdi)
+{
+ struct dev_context *devc = sdi->priv;
+ uint8_t coupling = 0xFF & ((devc->coupling[1] << 4) | devc->coupling[0]);
+
+ sr_dbg("update coupling 0x%x", coupling);
+
+ return write_control(sdi, COUPLING_REG, coupling);
+}
+
SR_PRIV int hantek_6xxx_update_channels(const struct sr_dev_inst *sdi)
{
struct dev_context *devc = sdi->priv;
hantek_6xxx_update_samplerate(sdi);
hantek_6xxx_update_vdiv(sdi);
+ hantek_6xxx_update_coupling(sdi);
// hantek_6xxx_update_channels(sdi); /* Only 2 channel mode supported. */
return SR_OK;
#define MAX_RENUM_DELAY_MS 3000
#define DEFAULT_VOLTAGE 2
+#define DEFAULT_COUPLING COUPLING_DC
#define DEFAULT_SAMPLERATE SR_MHZ(8)
#define NUM_CHANNELS 2
SAMPLERATE_REG = 0xe2,
TRIGGER_REG = 0xe3,
CHANNELS_REG = 0xe4,
+ COUPLING_REG = 0xe5,
};
enum states {
STOPPING,
};
+enum couplings {
+ COUPLING_AC = 0,
+ COUPLING_DC,
+};
+
struct hantek_6xxx_profile {
/* VID/PID after cold boot */
uint16_t orig_vid;
gboolean ch_enabled[NUM_CHANNELS];
int voltage[NUM_CHANNELS];
+ int coupling[NUM_CHANNELS];
uint64_t samplerate;
uint64_t limit_msec;
SR_PRIV int hantek_6xxx_start_data_collecting(const struct sr_dev_inst *sdi);
SR_PRIV int hantek_6xxx_stop_data_collecting(const struct sr_dev_inst *sdi);
+SR_PRIV int hantek_6xxx_update_coupling(const struct sr_dev_inst *sdi);
SR_PRIV int hantek_6xxx_update_samplerate(const struct sr_dev_inst *sdi);
SR_PRIV int hantek_6xxx_update_vdiv(const struct sr_dev_inst *sdi);
SR_PRIV int hantek_6xxx_update_channels(const struct sr_dev_inst *sdi);