SR_CONF_SAMPLERATE,
SR_CONF_EXTERNAL_CLOCK,
SR_CONF_CLOCK_EDGE,
- SR_CONF_TRIGGER_TYPE,
+ SR_CONF_TRIGGER_MATCH,
SR_CONF_TRIGGER_SOURCE,
SR_CONF_TRIGGER_SLOPE,
SR_CONF_LIMIT_MSEC,
SR_CONF_LIMIT_SAMPLES,
};
+static const int32_t trigger_matches[] = {
+ SR_TRIGGER_ZERO,
+ SR_TRIGGER_ONE,
+ SR_TRIGGER_RISING,
+ SR_TRIGGER_FALLING,
+};
+
/* The hardware supports more samplerates than these, but these are the
* options hardcoded into the vendor's Windows GUI.
*/
}
static int config_channel_set(const struct sr_dev_inst *sdi,
- struct sr_channel *ch, unsigned int changes)
+ struct sr_channel *ch, unsigned int changes)
{
uint64_t channel_bit;
- uint64_t trigger_mask;
- uint64_t trigger_values;
- uint64_t trigger_edge_mask;
struct dev_context *devc;
devc = sdi->priv;
devc->channel_mask &= ~channel_bit;
}
- if ((changes & SR_CHANNEL_SET_TRIGGER) != 0) {
- trigger_mask = devc->trigger_mask & ~channel_bit;
- trigger_values = devc->trigger_values & ~channel_bit;
- trigger_edge_mask = devc->trigger_edge_mask & ~channel_bit;
-
- if (ch->trigger && ch->trigger[0] != '\0') {
- if (ch->trigger[1] != '\0') {
- sr_warn("Trigger configuration \"%s\" with "
- "multiple stages is not supported.",
- ch->trigger);
- return SR_ERR_ARG;
- }
- /* Enable trigger for this channel. */
- trigger_mask |= channel_bit;
-
- /* Configure edge mask and trigger value. */
- switch (ch->trigger[0]) {
- case '1': trigger_values |= channel_bit;
- case '0': break;
-
- case 'r': trigger_values |= channel_bit;
- case 'f': trigger_edge_mask |= channel_bit;
- break;
- default:
- sr_warn("Trigger type '%c' is not supported.",
- ch->trigger[0]);
- return SR_ERR_ARG;
- }
- }
- /* Store validated trigger setup. */
- devc->trigger_mask = trigger_mask;
- devc->trigger_values = trigger_values;
- devc->trigger_edge_mask = trigger_edge_mask;
- }
-
return SR_OK;
}
g_variant_builder_add(&gvb, "{sv}", "samplerates", gvar);
*data = g_variant_builder_end(&gvb);
break;
- case SR_CONF_TRIGGER_TYPE:
- *data = g_variant_new_string(TRIGGER_TYPES);
+ case SR_CONF_TRIGGER_MATCH:
+ *data = g_variant_new_fixed_array(G_VARIANT_TYPE_INT32,
+ trigger_matches, ARRAY_SIZE(trigger_matches),
+ sizeof(int32_t));
break;
case SR_CONF_TRIGGER_SOURCE:
*data = g_variant_new_strv(trigger_source_names,
sr_info("Starting acquisition.");
devc->acquisition = acq;
+ lwla_convert_trigger(sdi);
ret = lwla_setup_acquisition(sdi);
if (ret != SR_OK) {
sr_err("Failed to set up acquisition.");
return ret;
}
+SR_PRIV int lwla_convert_trigger(const struct sr_dev_inst *sdi)
+{
+ struct dev_context *devc;
+ struct sr_trigger *trigger;
+ struct sr_trigger_stage *stage;
+ struct sr_trigger_match *match;
+ const GSList *l, *m;
+ uint64_t channel_index;
+
+ devc = sdi->priv;
+
+ devc->trigger_mask = 0;
+ devc->trigger_values = 0;
+ devc->trigger_edge_mask = 0;
+
+ if (!(trigger = sr_session_trigger_get()))
+ return SR_OK;
+
+ if (g_slist_length(trigger->stages) > 1) {
+ sr_err("This device only supports 1 trigger stage.");
+ return SR_ERR;
+ }
+
+ for (l = trigger->stages; l; l = l->next) {
+ stage = l->data;
+ for (m = stage->matches; m; m = m->next) {
+ match = m->data;
+ if (!match->channel->enabled)
+ /* Ignore disabled channels with a trigger. */
+ continue;
+ channel_index = 1 << match->channel->index;
+ devc->trigger_mask |= channel_index;
+ switch (match->match) {
+ case SR_TRIGGER_ONE:
+ devc->trigger_values |= channel_index;
+ break;
+ case SR_TRIGGER_RISING:
+ devc->trigger_values |= channel_index;
+ /* Fall through for edge mask. */
+ case SR_TRIGGER_FALLING:
+ devc->trigger_edge_mask |= channel_index;
+ break;
+ }
+ }
+ }
+
+ return SR_OK;
+}
+
/* Select the LWLA clock configuration. If the clock source changed from
* the previous setting, this will download a new bitstream to the FPGA.
*/
#define USB_TIMEOUT 3000 /* ms */
#define NUM_CHANNELS 34
-#define TRIGGER_TYPES "01fr"
/* Bit mask covering all 34 channels.
*/
SR_PRIV void lwla_free_acquisition_state(struct acquisition_state *acq);
SR_PRIV int lwla_init_device(const struct sr_dev_inst *sdi);
+SR_PRIV int lwla_convert_trigger(const struct sr_dev_inst *sdi);
SR_PRIV int lwla_set_clock_config(const struct sr_dev_inst *sdi);
SR_PRIV int lwla_setup_acquisition(const struct sr_dev_inst *sdi);
SR_PRIV int lwla_start_acquisition(const struct sr_dev_inst *sdi);