]> sigrok.org Git - libsigrokdecode.git/commitdiff
DCF77: Add dcf77_480s_pon_interrupted.sr and more info.
authorUwe Hermann <redacted>
Tue, 10 Jan 2012 19:15:17 +0000 (20:15 +0100)
committerUwe Hermann <redacted>
Tue, 10 Jan 2012 19:15:17 +0000 (20:15 +0100)
dcf77/pollin_dcf1_module/README
dcf77/pollin_dcf1_module/dcf77_480s_pon_interrupted.sr [new file with mode: 0644]

index 68c1759284f16c280861fb0f1cabbad2f062bab6..ef8977d9b16011328c46665a372cb1c4db1db07f 100644 (file)
@@ -3,13 +3,17 @@ DCF77
 -------------------------------------------------------------------------------
 
 This is a set of example captures of a DCF77 signal. The hardware used for
-receiving the signal is a Pollin DCF1 module (3.3V supply).
+receiving the signal is a Pollin DCF1 module (3.3V supply). The Pollin
+order number for the module is 810 054.
 
 The dumps were made January 9, 2012 in the evening/night.
+Only the dcf77_480s_pon_interrupted.sr dump was made January 10, 2012 in
+the evening.
 
 Details:
 http://en.wikipedia.org/wiki/DCF77
 http://www.pollin.de/shop/dt/NTQ5OTgxOTk-/Bausaetze_Module/Module/DCF_Empfangsmodul_DCF1.html
+http://www.pollin.de/shop/downloads/D810054D.PDF
 
 
 Logic analyzer setup
@@ -36,3 +40,10 @@ The sigrok command line used was:
 
 The time and samplerate varies, depending on the file.
 
+The dcf77_480s_interrupted.sr file contains a dump where the power was removed
+from the module one or more times during the capture.
+
+The dcf77_480s_pon_interrupted.sr file contains a dump where the PON pin was
+set from low to high (PON = high means that the device is disabled) for a
+few seconds, then back to low.
+
diff --git a/dcf77/pollin_dcf1_module/dcf77_480s_pon_interrupted.sr b/dcf77/pollin_dcf1_module/dcf77_480s_pon_interrupted.sr
new file mode 100644 (file)
index 0000000..246cbf1
Binary files /dev/null and b/dcf77/pollin_dcf1_module/dcf77_480s_pon_interrupted.sr differ