srd: SPI: s/rxcount/bitcount/.

diff --git a/decoders/spi.py b/decoders/spi.py
index 6b5df8092fad5c566f3f19892468ba2d715dcc28..9fb6036db609153957cacdc68a33146dc78695e3 100644 (file)
--- a/decoders/spi.py
+++ b/decoders/spi.py
@@ -42,7 +42,7 @@ class Decoder(srd.Decoder):
 
     def __init__(self):
         self.oldsck = 1
-        self.rxcount = 0
+        self.bitcount = 0
         self.rxdata = 0
         self.bytesreceived = 0
 
@@ -68,17 +68,17 @@ class Decoder(srd.Decoder):
                 continue
 
             # If this is the first bit, save timestamp.
-            if self.rxcount == 0:
+            if self.bitcount == 0:
                 self.time = samplenum
 
             # Receive bit into our shift register.
             if sdata == 1:
-                self.rxdata |= 1 << (7 - self.rxcount)
+                self.rxdata |= 1 << (7 - self.bitcount)
 
-            self.rxcount += 1
+            self.bitcount += 1
 
             # Continue to receive if not a byte yet.
-            if self.rxcount != 8:
+            if self.bitcount != 8:
                 continue
 
             # self.put(0, 0, self.out_proto, out_proto) # TODO
@@ -86,7 +86,7 @@ class Decoder(srd.Decoder):
 
             # Reset decoder state.
             self.rxdata = 0
-            self.rxcount = 0
+            self.bitcount = 0
 
             # Keep stats for summary.
             self.bytesreceived += 1