]> sigrok.org Git - libsigrok.git/commitdiff
asix-sigma: sync FPGA register names with documentation
authorGerhard Sittig <redacted>
Sat, 9 May 2020 15:16:13 +0000 (17:16 +0200)
committerGerhard Sittig <redacted>
Fri, 29 May 2020 05:49:58 +0000 (07:49 +0200)
Rename source code identifiers for FPGA registers to closer match the
vendor's documentation.

src/hardware/asix-sigma/api.c
src/hardware/asix-sigma/protocol.c
src/hardware/asix-sigma/protocol.h

index 40f6cd001b57bd375374f0c3d41aba2555f1c612..15c222521aca1c7d6fd0f0ae01ec10f55a694960 100644 (file)
@@ -412,12 +412,12 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
        }
 
        /* Enter trigger programming mode. */
-       sigma_set_register(WRITE_TRIGGER_SELECT1, 0x20, devc);
+       sigma_set_register(WRITE_TRIGGER_SELECT2, 0x20, devc);
 
        triggerselect = 0;
        if (devc->cur_samplerate >= SR_MHZ(100)) {
                /* 100 and 200 MHz mode. */
-               sigma_set_register(WRITE_TRIGGER_SELECT1, 0x81, devc);
+               sigma_set_register(WRITE_TRIGGER_SELECT2, 0x81, devc);
 
                /* Find which pin to trigger on from mask. */
                for (triggerpin = 0; triggerpin < 8; triggerpin++)
@@ -451,7 +451,7 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
                             sizeof(struct triggerinout), devc);
 
        /* Go back to normal mode. */
-       sigma_set_register(WRITE_TRIGGER_SELECT1, triggerselect, devc);
+       sigma_set_register(WRITE_TRIGGER_SELECT2, triggerselect, devc);
 
        /* Set clock select register. */
        clockselect.async = 0;
index f18344d45eba0822df4f8f127cddf86f92b9b0b2..0e27f07a4042c2c1a9355fbcc62ca4e8390af532 100644 (file)
@@ -250,13 +250,13 @@ SR_PRIV int sigma_write_trigger_lut(struct triggerlut *lut, struct dev_context *
                if (lut->m1d[3] & bit)
                        tmp[1] |= 0x80;
 
-               sigma_write_register(WRITE_TRIGGER_SELECT0, tmp, sizeof(tmp),
+               sigma_write_register(WRITE_TRIGGER_SELECT, tmp, sizeof(tmp),
                                     devc);
-               sigma_set_register(WRITE_TRIGGER_SELECT1, 0x30 | i, devc);
+               sigma_set_register(WRITE_TRIGGER_SELECT2, 0x30 | i, devc);
        }
 
        /* Send the parameters */
-       sigma_write_register(WRITE_TRIGGER_SELECT0, (uint8_t *) &lut->params,
+       sigma_write_register(WRITE_TRIGGER_SELECT, (uint8_t *) &lut->params,
                             sizeof(lut->params), devc);
 
        return SR_OK;
index 929c930c63a2bcbed8b45c1b6232fb6cb829d336..a32ee15e724f40b799246e28967beb4a6e2fc86e 100644 (file)
@@ -55,14 +55,14 @@ enum asix_device_type {
 
 enum sigma_write_register {
        WRITE_CLOCK_SELECT      = 0,
-       WRITE_TRIGGER_SELECT0   = 1,
-       WRITE_TRIGGER_SELECT1   = 2,
+       WRITE_TRIGGER_SELECT    = 1,
+       WRITE_TRIGGER_SELECT2   = 2,
        WRITE_MODE              = 3,
        WRITE_MEMROW            = 4,
        WRITE_POST_TRIGGER      = 5,
        WRITE_TRIGGER_OPTION    = 6,
        WRITE_PIN_VIEW          = 7,
-
+       /* Unassigned register locations. */
        WRITE_TEST              = 15,
 };
 
@@ -79,8 +79,9 @@ enum sigma_read_register {
        READ_PIN_CHANGE_HIGH    = 9,
        READ_BLOCK_LAST_TS_LOW  = 10,
        READ_BLOCK_LAST_TS_HIGH = 11,
-       READ_PIN_VIEW           = 12,
-
+       READ_BLOCK_TS_OVERRUN   = 12,
+       READ_PIN_VIEW           = 13,
+       /* Unassigned register location. */
        READ_TEST               = 15,
 };