)
(layers
- (0 Front signal)
- (31 Back signal)
+ (0 F.Cu signal)
+ (31 B.Cu signal)
(34 B.Paste user hide)
(35 F.Paste user hide)
(38 B.Mask user hide)
(add_net "Net-(D1-Pad1)")
)
- (module SM0402 (layer Front) (tedit 4FCE909E) (tstamp 4FCBF572)
+ (module SM0402 (layer F.Cu) (tedit 4FCE909E) (tstamp 4FCBF572)
(at 74.93 38.735 180)
(path /4FCAA85F)
(attr smd)
(fp_line (start 0.254 -0.381) (end 0.762 -0.381) (layer F.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.254 0.381) (layer F.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0 180) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
+ (pad 1 smd rect (at -0.44958 0 180) (size 0.39878 0.59944) (layers F.Cu F.Paste F.Mask)
(net 1 +5V))
- (pad 2 smd rect (at 0.44958 0 180) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
+ (pad 2 smd rect (at 0.44958 0 180) (size 0.39878 0.59944) (layers F.Cu F.Paste F.Mask)
(net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SM0402 (layer Back) (tedit 4FCE9854) (tstamp 4FCBF566)
+ (module SM0402 (layer B.Cu) (tedit 4FCE9854) (tstamp 4FCBF566)
(at 77.343 38.862 90)
(path /4FCA9777)
(attr smd)
(fp_line (start 0.254 0.381) (end 0.762 0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0 90) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 1 smd rect (at -0.44958 0 90) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3))
- (pad 2 smd rect (at 0.44958 0 90) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 2 smd rect (at 0.44958 0 90) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SM0402 (layer Front) (tedit 4FCE9564) (tstamp 4FCBF574)
+ (module SM0402 (layer F.Cu) (tedit 4FCE9564) (tstamp 4FCBF574)
(at 71.374 38.735 180)
(path /4FCAAEBC)
(attr smd)
(fp_line (start 0.254 -0.381) (end 0.762 -0.381) (layer F.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.254 0.381) (layer F.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0 180) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
+ (pad 1 smd rect (at -0.44958 0 180) (size 0.39878 0.59944) (layers F.Cu F.Paste F.Mask)
(net 22 "Net-(D1-Pad1)"))
- (pad 2 smd rect (at 0.44958 0 180) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
+ (pad 2 smd rect (at 0.44958 0 180) (size 0.39878 0.59944) (layers F.Cu F.Paste F.Mask)
(net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SOT23-5 (layer Front) (tedit 4FCE8523) (tstamp 4FCBF54B)
+ (module SOT23-5 (layer F.Cu) (tedit 4FCE8523) (tstamp 4FCBF54B)
(at 75.15098 41.39946 270)
(path /4FCAA78E)
(attr smd)
(fp_line (start 1.524 0.889) (end -1.524 0.889) (layer F.SilkS) (width 0.127))
(fp_line (start -1.524 0.889) (end -1.524 -0.889) (layer F.SilkS) (width 0.127))
(fp_line (start -1.524 -0.889) (end 1.524 -0.889) (layer F.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.9525 1.27 270) (size 0.508 0.762) (layers Front F.Paste F.Mask)
+ (pad 1 smd rect (at -0.9525 1.27 270) (size 0.508 0.762) (layers F.Cu F.Paste F.Mask)
(net 1 +5V))
- (pad 3 smd rect (at 0.9525 1.27 270) (size 0.508 0.762) (layers Front F.Paste F.Mask)
+ (pad 3 smd rect (at 0.9525 1.27 270) (size 0.508 0.762) (layers F.Cu F.Paste F.Mask)
(net 1 +5V))
- (pad 5 smd rect (at -0.9525 -1.27 270) (size 0.508 0.762) (layers Front F.Paste F.Mask)
+ (pad 5 smd rect (at -0.9525 -1.27 270) (size 0.508 0.762) (layers F.Cu F.Paste F.Mask)
(net 20 +3V3))
- (pad 2 smd rect (at 0 1.27 270) (size 0.508 0.762) (layers Front F.Paste F.Mask)
+ (pad 2 smd rect (at 0 1.27 270) (size 0.508 0.762) (layers F.Cu F.Paste F.Mask)
(net 19 GND))
- (pad 4 smd rect (at 0.9525 -1.27 270) (size 0.508 0.762) (layers Front F.Paste F.Mask)
+ (pad 4 smd rect (at 0.9525 -1.27 270) (size 0.508 0.762) (layers F.Cu F.Paste F.Mask)
(net 21 "Net-(C15-Pad1)"))
(model smd/SOT23_5.wrl
(at (xyz 0 0 0))
)
)
- (module QFN56 (layer Back) (tedit 4FCBF74A) (tstamp 4FCE8310)
+ (module QFN56 (layer B.Cu) (tedit 4FCBF74A) (tstamp 4FCE8310)
(at 73.1012 43.8658 270)
(path /4FC8F245)
(fp_text reference IC1 (at 0 -0.50038 270) (layer B.SilkS) hide
(fp_text value CY7C68013A-56 (at 0.59944 21.69922 270) (layer B.SilkS) hide
(effects (font (thickness 0.3048)) (justify mirror))
)
- (pad "" smd rect (at 0 0 270) (size 4.8006 5.4991) (layers Back B.Paste B.Mask)
+ (pad "" smd rect (at 0 0 270) (size 4.8006 5.4991) (layers B.Cu B.Paste B.Mask)
(clearance 0.01016))
- (pad 28 smd rect (at -3.25374 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 28 smd rect (at -3.25374 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(net 19 GND) (clearance 0.09906))
- (pad 27 smd rect (at -2.75336 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 27 smd rect (at -2.75336 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3) (clearance 0.09906))
- (pad 26 smd rect (at -2.25298 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 26 smd rect (at -2.25298 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(net 19 GND) (clearance 0.09906))
- (pad 25 smd rect (at -1.7526 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 25 smd rect (at -1.7526 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(net 12 /PB7) (clearance 0.09906))
- (pad 24 smd rect (at -1.25476 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 24 smd rect (at -1.25476 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(net 11 /PB6) (clearance 0.09906))
- (pad 23 smd rect (at -0.75438 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 23 smd rect (at -0.75438 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(net 10 /PB5) (clearance 0.09906))
- (pad 22 smd rect (at -0.254 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 22 smd rect (at -0.254 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(net 9 /PB4) (clearance 0.09906))
- (pad 21 smd rect (at 0.24638 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 21 smd rect (at 0.24638 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(net 8 /PB3) (clearance 0.09906))
- (pad 20 smd rect (at 0.74676 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 20 smd rect (at 0.74676 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(net 7 /PB2) (clearance 0.09906))
- (pad 19 smd rect (at 1.24714 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 19 smd rect (at 1.24714 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(net 6 /PB1) (clearance 0.09906))
- (pad 18 smd rect (at 1.74752 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 18 smd rect (at 1.74752 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(net 5 /PB0) (clearance 0.09906))
- (pad 17 smd rect (at 2.2479 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 17 smd rect (at 2.2479 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3) (clearance 0.09906))
- (pad 16 smd rect (at 2.74574 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 16 smd rect (at 2.74574 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(net 15 /SDA) (clearance 0.09906))
- (pad 15 smd rect (at 3.24612 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 15 smd rect (at 3.24612 -3.84556 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(net 14 /SCL) (clearance 0.09906))
- (pad 29 smd rect (at -3.85318 -3.24612 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 29 smd rect (at -3.85318 -3.24612 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 30 smd rect (at -3.85318 -2.74574 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 30 smd rect (at -3.85318 -2.74574 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 31 smd rect (at -3.85318 -2.24536 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 31 smd rect (at -3.85318 -2.24536 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 32 smd rect (at -3.85318 -1.74498 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 32 smd rect (at -3.85318 -1.74498 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3) (clearance 0.09906))
- (pad 33 smd rect (at -3.85318 -1.2446 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 33 smd rect (at -3.85318 -1.2446 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(net 4 /PA0) (clearance 0.09906))
- (pad 34 smd rect (at -3.85318 -0.74422 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 34 smd rect (at -3.85318 -0.74422 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 35 smd rect (at -3.85318 -0.24384 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 35 smd rect (at -3.85318 -0.24384 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 36 smd rect (at -3.85318 0.254 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 36 smd rect (at -3.85318 0.254 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 37 smd rect (at -3.85318 0.75438 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 37 smd rect (at -3.85318 0.75438 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 38 smd rect (at -3.85318 1.25476 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 38 smd rect (at -3.85318 1.25476 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 39 smd rect (at -3.85318 1.75514 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 39 smd rect (at -3.85318 1.75514 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 40 smd rect (at -3.85318 2.25552 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 40 smd rect (at -3.85318 2.25552 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 41 smd rect (at -3.85318 2.7559 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 41 smd rect (at -3.85318 2.7559 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(net 19 GND) (clearance 0.09906))
- (pad 42 smd rect (at -3.85318 3.25374 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 42 smd rect (at -3.85318 3.25374 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(net 13 /RESET#) (clearance 0.09906))
- (pad 43 smd rect (at -3.25374 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 43 smd rect (at -3.25374 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3) (clearance 0.09906))
- (pad 44 smd rect (at -2.80162 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 44 smd rect (at -2.80162 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(net 16 /WAKEUP) (clearance 0.09906))
- (pad 45 smd rect (at -2.30378 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 45 smd rect (at -2.30378 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 46 smd rect (at -1.8034 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 46 smd rect (at -1.8034 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 47 smd rect (at -1.30302 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 47 smd rect (at -1.30302 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 48 smd rect (at -0.80264 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 48 smd rect (at -0.80264 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 49 smd rect (at -0.30226 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 49 smd rect (at -0.30226 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 50 smd rect (at 0.19812 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 50 smd rect (at 0.19812 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 51 smd rect (at 0.6985 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 51 smd rect (at 0.6985 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 52 smd rect (at 1.19634 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 52 smd rect (at 1.19634 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 53 smd rect (at 1.69672 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 53 smd rect (at 1.69672 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(net 19 GND) (clearance 0.09906))
- (pad 54 smd rect (at 2.1971 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 54 smd rect (at 2.1971 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 55 smd rect (at 2.69748 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 55 smd rect (at 2.69748 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3) (clearance 0.09906))
- (pad 56 smd rect (at 3.19786 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
+ (pad 56 smd rect (at 3.19786 3.85572 270) (size 0.2794 0.69088) (layers B.Cu B.Paste B.Mask)
(net 19 GND) (clearance 0.09906))
- (pad 1 smd rect (at 3.7973 3.25628 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 1 smd rect (at 3.7973 3.25628 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 2 smd rect (at 3.7973 2.7559 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 2 smd rect (at 3.7973 2.7559 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 3 smd rect (at 3.7973 2.25552 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 3 smd rect (at 3.7973 2.25552 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3) (clearance 0.09906))
- (pad 4 smd rect (at 3.7973 1.75514 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 4 smd rect (at 3.7973 1.75514 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(net 18 /XTALOUT) (clearance 0.09906))
- (pad 5 smd rect (at 3.7973 1.25476 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 5 smd rect (at 3.7973 1.25476 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(net 17 /XTALIN) (clearance 0.09906))
- (pad 6 smd rect (at 3.7973 0.75438 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 6 smd rect (at 3.7973 0.75438 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(net 19 GND) (clearance 0.09906))
- (pad 7 smd rect (at 3.7973 0.254 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 7 smd rect (at 3.7973 0.254 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3) (clearance 0.09906))
- (pad 8 smd rect (at 3.7973 -0.24384 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 8 smd rect (at 3.7973 -0.24384 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(net 3 /DP) (clearance 0.09906))
- (pad 9 smd rect (at 3.7973 -0.74422 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 9 smd rect (at 3.7973 -0.74422 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(net 2 /DM) (clearance 0.09906))
- (pad 10 smd rect (at 3.7973 -1.2446 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 10 smd rect (at 3.7973 -1.2446 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(net 19 GND) (clearance 0.09906))
- (pad 11 smd rect (at 3.7973 -1.74498 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 11 smd rect (at 3.7973 -1.74498 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3) (clearance 0.09906))
- (pad 12 smd rect (at 3.7973 -2.24536 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 12 smd rect (at 3.7973 -2.24536 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(net 19 GND) (clearance 0.09906))
- (pad 13 smd rect (at 3.7973 -2.74574 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 13 smd rect (at 3.7973 -2.74574 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(clearance 0.09906))
- (pad 14 smd rect (at 3.7973 -3.24612 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
+ (pad 14 smd rect (at 3.7973 -3.24612 270) (size 0.69088 0.2794) (layers B.Cu B.Paste B.Mask)
(net 19 GND) (clearance 0.09906))
)
- (module SM0402 (layer Back) (tedit 4FCE9096) (tstamp 4FCBF580)
+ (module SM0402 (layer B.Cu) (tedit 4FCE9096) (tstamp 4FCBF580)
(at 79.883 39.37 270)
(path /4FCAA863)
(attr smd)
(fp_line (start 0.254 0.381) (end 0.762 0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0 270) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 1 smd rect (at -0.44958 0 270) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3))
- (pad 2 smd rect (at 0.44958 0 270) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 2 smd rect (at 0.44958 0 270) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SM0402 (layer Front) (tedit 4FCE90A1) (tstamp 4FCBF570)
+ (module SM0402 (layer F.Cu) (tedit 4FCE90A1) (tstamp 4FCBF570)
(at 78.74 38.989 180)
(path /4FCAA86B)
(attr smd)
(fp_line (start 0.254 -0.381) (end 0.762 -0.381) (layer F.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.254 0.381) (layer F.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0 180) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
+ (pad 1 smd rect (at -0.44958 0 180) (size 0.39878 0.59944) (layers F.Cu F.Paste F.Mask)
(net 21 "Net-(C15-Pad1)"))
- (pad 2 smd rect (at 0.44958 0 180) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
+ (pad 2 smd rect (at 0.44958 0 180) (size 0.39878 0.59944) (layers F.Cu F.Paste F.Mask)
(net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SM0402 (layer Back) (tedit 4FCE909B) (tstamp 4FCBF56E)
+ (module SM0402 (layer B.Cu) (tedit 4FCE909B) (tstamp 4FCBF56E)
(at 75.311 38.481)
(path /4FCA97A0)
(attr smd)
(fp_line (start 0.254 0.381) (end 0.762 0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3))
- (pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SM0402 (layer Back) (tedit 4FCE9094) (tstamp 4FCBF56A)
+ (module SM0402 (layer B.Cu) (tedit 4FCE9094) (tstamp 4FCBF56A)
(at 71.12 38.862 180)
(path /4FCAA3E6)
(attr smd)
(fp_line (start 0.254 0.381) (end 0.762 0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0 180) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 1 smd rect (at -0.44958 0 180) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3))
- (pad 2 smd rect (at 0.44958 0 180) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 2 smd rect (at 0.44958 0 180) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 13 /RESET#))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SM0402 (layer Back) (tedit 4FCE90AA) (tstamp 4FCBF54C)
+ (module SM0402 (layer B.Cu) (tedit 4FCE90AA) (tstamp 4FCBF54C)
(at 78.74 38.862 270)
(path /4FCA9724)
(attr smd)
(fp_line (start 0.254 0.381) (end 0.762 0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0 270) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 1 smd rect (at -0.44958 0 270) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3))
- (pad 2 smd rect (at 0.44958 0 270) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 2 smd rect (at 0.44958 0 270) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SM0402 (layer Back) (tedit 4FCE9060) (tstamp 4FCE905B)
+ (module SM0402 (layer B.Cu) (tedit 4FCE9060) (tstamp 4FCE905B)
(at 75.692 50.165)
(path /4FCA9793)
(attr smd)
(fp_line (start 0.254 0.381) (end 0.762 0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3))
- (pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SM0402 (layer Back) (tedit 4FCE9076) (tstamp 4FCBF564)
+ (module SM0402 (layer B.Cu) (tedit 4FCE9076) (tstamp 4FCBF564)
(at 75.692 48.768)
(path /4FCA96AB)
(attr smd)
(fp_line (start 0.254 0.381) (end 0.762 0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3))
- (pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SM0402 (layer Back) (tedit 4FCE907D) (tstamp 515DB414)
+ (module SM0402 (layer B.Cu) (tedit 4FCE907D) (tstamp 515DB414)
(at 68.3006 46.0502 90)
(path /4FCA9799)
(attr smd)
(fp_line (start 0.254 0.381) (end 0.762 0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0 90) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 1 smd rect (at -0.44958 0 90) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3))
- (pad 2 smd rect (at 0.44958 0 90) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 2 smd rect (at 0.44958 0 90) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SM0402 (layer Back) (tedit 4FCE9086) (tstamp 4FCBF560)
+ (module SM0402 (layer B.Cu) (tedit 4FCE9086) (tstamp 4FCBF560)
(at 74.295 49.149 90)
(path /4FCA9C86)
(attr smd)
(fp_line (start 0.254 0.381) (end 0.762 0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0 90) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 1 smd rect (at -0.44958 0 90) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3))
- (pad 2 smd rect (at 0.44958 0 90) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 2 smd rect (at 0.44958 0 90) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SM0402 (layer Back) (tedit 4FCE90AC) (tstamp 4FCBF55E)
+ (module SM0402 (layer B.Cu) (tedit 4FCE90AC) (tstamp 4FCBF55E)
(at 77.4065 49.0855 90)
(path /4FCA9C79)
(attr smd)
(fp_line (start 0.254 0.381) (end 0.762 0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0 90) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 1 smd rect (at -0.44958 0 90) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3))
- (pad 2 smd rect (at 0.44958 0 90) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 2 smd rect (at 0.44958 0 90) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SM0402 (layer Back) (tedit 4FCE908E) (tstamp 4FCBF55C)
+ (module SM0402 (layer B.Cu) (tedit 4FCE908E) (tstamp 4FCBF55C)
(at 71.882 48.895)
(path /4FC8F6F8)
(attr smd)
(fp_line (start 0.254 0.381) (end 0.762 0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 17 /XTALIN))
- (pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SM0402 (layer Back) (tedit 4FCE90AE) (tstamp 4FCBF55A)
+ (module SM0402 (layer B.Cu) (tedit 4FCE90AE) (tstamp 4FCBF55A)
(at 68.3006 47.85106 90)
(path /4FC8F6F5)
(attr smd)
(fp_line (start 0.254 0.381) (end 0.762 0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0 90) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 1 smd rect (at -0.44958 0 90) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 18 /XTALOUT))
- (pad 2 smd rect (at 0.44958 0 90) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 2 smd rect (at 0.44958 0 90) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SM0402 (layer Front) (tedit 4FCE9081) (tstamp 4FCE9F16)
+ (module SM0402 (layer F.Cu) (tedit 4FCE9081) (tstamp 4FCE9F16)
(at 68.834 38.862)
(path /4FCBEB98)
(attr smd)
(fp_line (start 0.254 -0.381) (end 0.762 -0.381) (layer F.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.254 0.381) (layer F.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
+ (pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers F.Cu F.Paste F.Mask)
(net 20 +3V3))
- (pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
+ (pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers F.Cu F.Paste F.Mask)
(net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SM0402 (layer Back) (tedit 4FCE9556) (tstamp 4FCBF556)
+ (module SM0402 (layer B.Cu) (tedit 4FCE9556) (tstamp 4FCBF556)
(at 68.834 38.608 180)
(path /4FCA95B2)
(attr smd)
(fp_line (start 0.254 0.381) (end 0.762 0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0 180) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 1 smd rect (at -0.44958 0 180) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3))
- (pad 2 smd rect (at 0.44958 0 180) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 2 smd rect (at 0.44958 0 180) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 16 /WAKEUP))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SM0402 (layer Front) (tedit 4FCE90B3) (tstamp 4FCBF552)
+ (module SM0402 (layer F.Cu) (tedit 4FCE90B3) (tstamp 4FCBF552)
(at 79.375 48.26)
(path /4FCA93BD)
(attr smd)
(fp_line (start 0.254 -0.381) (end 0.762 -0.381) (layer F.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.254 0.381) (layer F.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
+ (pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers F.Cu F.Paste F.Mask)
(net 15 /SDA))
- (pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
+ (pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers F.Cu F.Paste F.Mask)
(net 20 +3V3))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SM0402 (layer Front) (tedit 4FCE905E) (tstamp 4FCBF550)
+ (module SM0402 (layer F.Cu) (tedit 4FCE905E) (tstamp 4FCBF550)
(at 71.882 50.165 180)
(path /4FCA9C5D)
(attr smd)
(fp_line (start 0.254 -0.381) (end 0.762 -0.381) (layer F.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.254 0.381) (layer F.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0 180) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
+ (pad 1 smd rect (at -0.44958 0 180) (size 0.39878 0.59944) (layers F.Cu F.Paste F.Mask)
(net 20 +3V3))
- (pad 2 smd rect (at 0.44958 0 180) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
+ (pad 2 smd rect (at 0.44958 0 180) (size 0.39878 0.59944) (layers F.Cu F.Paste F.Mask)
(net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SM0402 (layer Back) (tedit 4FCE9065) (tstamp 4FCBF54E)
+ (module SM0402 (layer B.Cu) (tedit 4FCE9065) (tstamp 4FCBF54E)
(at 73.279 49.784 90)
(path /4FCA9C7E)
(attr smd)
(fp_line (start 0.254 0.381) (end 0.762 0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0 90) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 1 smd rect (at -0.44958 0 90) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3))
- (pad 2 smd rect (at 0.44958 0 90) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 2 smd rect (at 0.44958 0 90) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SM0402 (layer Back) (tedit 4FCE90A9) (tstamp 4FCBF56C)
+ (module SM0402 (layer B.Cu) (tedit 4FCE90A9) (tstamp 4FCBF56C)
(at 78.74 49.5935 270)
(path /5151D52F)
(attr smd)
(fp_line (start 0.254 0.381) (end 0.762 0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0 270) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 1 smd rect (at -0.44958 0 270) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 14 /SCL))
- (pad 2 smd rect (at 0.44958 0 270) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 2 smd rect (at 0.44958 0 270) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 20 +3V3))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module SM0402 (layer Back) (tedit 5151D5A0) (tstamp 5151D57D)
+ (module SM0402 (layer B.Cu) (tedit 5151D5A0) (tstamp 5151D57D)
(at 73.406 38.735)
(path /4FCAAEBE)
(attr smd)
(fp_line (start 0.254 0.381) (end 0.762 0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
- (pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 22 "Net-(D1-Pad1)"))
- (pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
+ (pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers B.Cu B.Paste B.Mask)
(net 4 /PA0))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
)
)
- (module ABM11 (layer Back) (tedit 5962A342) (tstamp 596295DB)
+ (module ABM11 (layer B.Cu) (tedit 5962A342) (tstamp 596295DB)
(at 69.977 49.4792 90)
(path /5962A5CC)
(fp_text reference Y1 (at 0 -6.72592 90) (layer B.SilkS) hide
(fp_text value 24MHz (at 0 4.7498 90) (layer B.SilkS) hide
(effects (font (thickness 0.3048)) (justify mirror))
)
- (pad 1 smd rect (at -0.65024 -0.50038 90) (size 0.7493 0.65024) (layers Back B.Paste B.Mask)
+ (pad 1 smd rect (at -0.65024 -0.50038 90) (size 0.7493 0.65024) (layers B.Cu B.Paste B.Mask)
(net 17 /XTALIN) (clearance 0.09906))
- (pad 2 smd rect (at 0.6477 -0.50038 90) (size 0.7493 0.65024) (layers Back B.Paste B.Mask)
+ (pad 2 smd rect (at 0.6477 -0.50038 90) (size 0.7493 0.65024) (layers B.Cu B.Paste B.Mask)
(net 19 GND) (clearance 0.09906))
- (pad 3 smd rect (at 0.6477 0.50038 90) (size 0.7493 0.65024) (layers Back B.Paste B.Mask)
+ (pad 3 smd rect (at 0.6477 0.50038 90) (size 0.7493 0.65024) (layers B.Cu B.Paste B.Mask)
(net 18 /XTALOUT) (clearance 0.09906))
- (pad 4 smd rect (at -0.65024 0.50038 90) (size 0.7493 0.65024) (layers Back B.Paste B.Mask)
+ (pad 4 smd rect (at -0.65024 0.50038 90) (size 0.7493 0.65024) (layers B.Cu B.Paste B.Mask)
(net 19 GND) (clearance 0.09906))
)
- (module fx2grok-tiny:MICRO-USB-B-SMD (layer Front) (tedit 59AEE3E8) (tstamp 4FCBF583)
+ (module fx2grok-tiny:MICRO-USB-B-SMD (layer F.Cu) (tedit 59AEE3E8) (tstamp 4FCBF583)
(at 70.85076 44.74972 270)
(path /4FCAA5E6)
(fp_text reference U1 (at 0.14986 6.52018 270) (layer F.SilkS) hide
(fp_text value MICRO-USB-B-SMD (at -0.03048 -5.1689 270) (layer F.SilkS) hide
(effects (font (thickness 0.3048)))
)
- (pad 1 smd rect (at -1.30048 -0.94996 270) (size 0.39878 1.34874) (layers Front F.Paste F.Mask)
+ (pad 1 smd rect (at -1.30048 -0.94996 270) (size 0.39878 1.34874) (layers F.Cu F.Paste F.Mask)
(net 1 +5V) (clearance 0.09906))
- (pad 2 smd rect (at -0.65024 -0.94996 270) (size 0.39878 1.34874) (layers Front F.Paste F.Mask)
+ (pad 2 smd rect (at -0.65024 -0.94996 270) (size 0.39878 1.34874) (layers F.Cu F.Paste F.Mask)
(net 2 /DM) (clearance 0.09906))
- (pad 3 smd rect (at 0 -0.94996 270) (size 0.39878 1.34874) (layers Front F.Paste F.Mask)
+ (pad 3 smd rect (at 0 -0.94996 270) (size 0.39878 1.34874) (layers F.Cu F.Paste F.Mask)
(net 3 /DP) (clearance 0.09906))
- (pad 4 smd rect (at 0.65024 -0.94996 270) (size 0.39878 1.34874) (layers Front F.Paste F.Mask)
+ (pad 4 smd rect (at 0.65024 -0.94996 270) (size 0.39878 1.34874) (layers F.Cu F.Paste F.Mask)
(clearance 0.09906))
- (pad 5 smd rect (at 1.30048 -0.94996 270) (size 0.39878 1.34874) (layers Front F.Paste F.Mask)
+ (pad 5 smd rect (at 1.30048 -0.94996 270) (size 0.39878 1.34874) (layers F.Cu F.Paste F.Mask)
(net 19 GND) (clearance 0.09906))
- (pad 5 smd rect (at -3.0988 -0.8509 270) (size 2.10058 1.6002) (layers Front F.Paste F.Mask)
+ (pad 5 smd rect (at -3.0988 -0.8509 270) (size 2.10058 1.6002) (layers F.Cu F.Paste F.Mask)
(net 19 GND) (clearance 0.29972))
- (pad 5 smd rect (at 3.10134 -0.8509 270) (size 2.10058 1.6002) (layers Front F.Paste F.Mask)
+ (pad 5 smd rect (at 3.10134 -0.8509 270) (size 2.10058 1.6002) (layers F.Cu F.Paste F.Mask)
(net 19 GND) (clearance 0.29972))
- (pad 5 smd rect (at 3.8989 1.69926 270) (size 1.89992 1.89992) (layers Front F.Paste F.Mask)
+ (pad 5 smd rect (at 3.8989 1.69926 270) (size 1.89992 1.89992) (layers F.Cu F.Paste F.Mask)
(net 19 GND) (clearance 0.29972))
- (pad 5 smd rect (at 1.19888 1.69926 270) (size 1.89992 1.89992) (layers Front F.Paste F.Mask)
+ (pad 5 smd rect (at 1.19888 1.69926 270) (size 1.89992 1.89992) (layers F.Cu F.Paste F.Mask)
(net 19 GND) (clearance 0.29972))
- (pad 5 smd rect (at -1.19888 1.69926 270) (size 1.89992 1.89992) (layers Front F.Paste F.Mask)
+ (pad 5 smd rect (at -1.19888 1.69926 270) (size 1.89992 1.89992) (layers F.Cu F.Paste F.Mask)
(net 19 GND) (clearance 0.29972))
- (pad 5 smd rect (at -3.8989 1.69926 270) (size 1.89992 1.89992) (layers Front F.Paste F.Mask)
+ (pad 5 smd rect (at -3.8989 1.69926 270) (size 1.89992 1.89992) (layers F.Cu F.Paste F.Mask)
(net 19 GND) (clearance 0.29972))
)
- (module fx2grok-tiny:CONN-5x1-SMD-127MM (layer Back) (tedit 59B14D2B) (tstamp 5151CF2A)
+ (module fx2grok-tiny:CONN-5x1-SMD-127MM (layer B.Cu) (tedit 59B14D2B) (tstamp 5151CF2A)
(at 79.121 43.307 270)
(path /59637927)
(fp_text reference P2 (at 0.0762 -9.42594 270) (layer B.SilkS)
(fp_text value CONN_01X05 (at -0.0508 8.8011 270) (layer B.SilkS)
(effects (font (thickness 0.3048)) (justify mirror))
)
- (pad 1 smd rect (at -2.17932 -0.16002 270) (size 0.75946 2.2003) (layers Back B.Paste B.Mask)
+ (pad 1 smd rect (at -2.17932 -0.16002 270) (size 0.75946 2.2003) (layers B.Cu B.Paste B.Mask)
(net 19 GND) (clearance 0.0508))
- (pad 2 smd rect (at -0.90424 -0.16002 270) (size 0.75946 2.2003) (layers Back B.Paste B.Mask)
+ (pad 2 smd rect (at -0.90424 -0.16002 270) (size 0.75946 2.2003) (layers B.Cu B.Paste B.Mask)
(net 12 /PB7) (clearance 0.0508))
- (pad 3 smd rect (at 0.37084 -0.16002 270) (size 0.75946 2.2003) (layers Back B.Paste B.Mask)
+ (pad 3 smd rect (at 0.37084 -0.16002 270) (size 0.75946 2.2003) (layers B.Cu B.Paste B.Mask)
(net 10 /PB5) (clearance 0.0508))
- (pad 4 smd rect (at 1.64592 -0.16002 270) (size 0.75946 2.2003) (layers Back B.Paste B.Mask)
+ (pad 4 smd rect (at 1.64592 -0.16002 270) (size 0.75946 2.2003) (layers B.Cu B.Paste B.Mask)
(net 8 /PB3) (clearance 0.0508))
- (pad 5 smd rect (at 2.921 -0.16002 270) (size 0.75946 2.2003) (layers Back B.Paste B.Mask)
+ (pad 5 smd rect (at 2.921 -0.16002 270) (size 0.75946 2.2003) (layers B.Cu B.Paste B.Mask)
(net 6 /PB1) (clearance 0.0508))
)
- (module fx2grok-tiny:CONN-5x1-SMD-127MM (layer Front) (tedit 59B14D2B) (tstamp 4FCD3C8E)
+ (module fx2grok-tiny:CONN-5x1-SMD-127MM (layer F.Cu) (tedit 59B14D2B) (tstamp 4FCD3C8E)
(at 79.121 44.069 90)
(path /596377A2)
(fp_text reference P1 (at 0.0762 9.42594 90) (layer F.SilkS)
(fp_text value CONN_01X05 (at -0.0508 -8.8011 90) (layer F.SilkS)
(effects (font (thickness 0.3048)))
)
- (pad 1 smd rect (at -2.17932 0.16002 90) (size 0.75946 2.2003) (layers Front F.Paste F.Mask)
+ (pad 1 smd rect (at -2.17932 0.16002 90) (size 0.75946 2.2003) (layers F.Cu F.Paste F.Mask)
(net 5 /PB0) (clearance 0.0508))
- (pad 2 smd rect (at -0.90424 0.16002 90) (size 0.75946 2.2003) (layers Front F.Paste F.Mask)
+ (pad 2 smd rect (at -0.90424 0.16002 90) (size 0.75946 2.2003) (layers F.Cu F.Paste F.Mask)
(net 7 /PB2) (clearance 0.0508))
- (pad 3 smd rect (at 0.37084 0.16002 90) (size 0.75946 2.2003) (layers Front F.Paste F.Mask)
+ (pad 3 smd rect (at 0.37084 0.16002 90) (size 0.75946 2.2003) (layers F.Cu F.Paste F.Mask)
(net 9 /PB4) (clearance 0.0508))
- (pad 4 smd rect (at 1.64592 0.16002 90) (size 0.75946 2.2003) (layers Front F.Paste F.Mask)
+ (pad 4 smd rect (at 1.64592 0.16002 90) (size 0.75946 2.2003) (layers F.Cu F.Paste F.Mask)
(net 11 /PB6) (clearance 0.0508))
- (pad 5 smd rect (at 2.921 0.16002 90) (size 0.75946 2.2003) (layers Front F.Paste F.Mask)
+ (pad 5 smd rect (at 2.921 0.16002 90) (size 0.75946 2.2003) (layers F.Cu F.Paste F.Mask)
(net 19 GND) (clearance 0.0508))
)
(arrow2a (pts (xy 82.25536 50.75936) (xy 82.841781 49.632856)))
(arrow2b (pts (xy 82.25536 50.75936) (xy 81.668939 49.632856)))
)
- (gr_text "tiny 0.1" (at 76.454 44.45 90) (layer Front)
+ (gr_text "tiny 0.1" (at 76.454 44.45 90) (layer F.Cu)
(effects (font (size 0.762 0.508) (thickness 0.127)))
)
- (gr_text fx2grok (at 75.184 44.45 90) (layer Front)
+ (gr_text fx2grok (at 75.184 44.45 90) (layer F.Cu)
(effects (font (size 0.889 0.635) (thickness 0.127)))
)
(gr_line (start 79.70012 50.7492) (end 80.70088 50.7492) (angle 90) (layer Edge.Cuts) (width 0.0254))
(gr_line (start 67.70116 50.7492) (end 79.70012 50.7492) (angle 90) (layer Edge.Cuts) (width 0.0254))
(gr_line (start 67.70116 38.75024) (end 67.70116 50.7492) (angle 90) (layer Edge.Cuts) (width 0.0254))
- (segment (start 73.88098 40.44696) (end 73.88098 40.2336) (width 0.127) (layer Front) (net 1) (status 30))
- (segment (start 73.88098 40.2336) (end 75.37958 38.735) (width 0.127) (layer Front) (net 1) (tstamp 59B03C5D) (status 30))
- (segment (start 71.80072 43.44924) (end 72.37476 43.44924) (width 0.127) (layer Front) (net 1) (status 30))
- (segment (start 72.37476 43.44924) (end 72.39 43.434) (width 0.127) (layer Front) (net 1) (tstamp 59B01343) (status 30))
- (segment (start 72.39 43.434) (end 72.644 43.434) (width 0.127) (layer Front) (net 1) (tstamp 59B01345) (status 10))
- (segment (start 72.644 43.434) (end 73.025 43.053) (width 0.127) (layer Front) (net 1) (tstamp 59B01347))
- (segment (start 73.025 43.053) (end 73.025 42.545) (width 0.127) (layer Front) (net 1) (tstamp 59B0134E))
- (segment (start 73.025 42.545) (end 73.21804 42.35196) (width 0.127) (layer Front) (net 1) (tstamp 59B0134F))
- (segment (start 73.21804 42.35196) (end 73.88098 42.35196) (width 0.127) (layer Front) (net 1) (tstamp 59B01351) (status 20))
- (segment (start 75.311 38.80358) (end 75.37958 38.735) (width 0.127) (layer Front) (net 1) (tstamp 59B004F6) (status 30))
- (segment (start 73.88098 40.44696) (end 74.89698 40.44696) (width 0.127) (layer Front) (net 1) (status 10))
- (segment (start 75.30084 40.85082) (end 75.30084 41.84904) (width 0.127) (layer Front) (net 1))
- (segment (start 74.89698 40.44696) (end 75.30084 40.85082) (width 0.127) (layer Front) (net 1))
- (segment (start 75.30084 41.84904) (end 74.79792 42.35196) (width 0.127) (layer Front) (net 1))
- (segment (start 74.79792 42.35196) (end 73.88098 42.35196) (width 0.127) (layer Front) (net 1) (status 20))
- (segment (start 73.75398 46.8249) (end 73.8505 46.8249) (width 0.127) (layer Front) (net 2))
- (segment (start 73.1774 45.15104) (end 73.1774 46.24832) (width 0.127) (layer Front) (net 2))
- (segment (start 73.84542 46.82998) (end 73.84542 47.6631) (width 0.127) (layer Back) (net 2) (status 20))
- (segment (start 72.75068 44.72432) (end 73.1774 45.15104) (width 0.127) (layer Front) (net 2))
- (segment (start 72.75068 44.42714) (end 72.75068 44.72432) (width 0.127) (layer Front) (net 2))
- (segment (start 73.1774 46.24832) (end 73.75398 46.8249) (width 0.127) (layer Front) (net 2))
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- (via (at 73.8505 46.8249) (size 0.44958) (layers Front Back) (net 2))
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- (segment (start 73.14946 46.8757) (end 73.34504 47.07128) (width 0.127) (layer Back) (net 3))
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- (segment (start 72.34936 44.74972) (end 72.72528 45.12564) (width 0.127) (layer Front) (net 3) (status 10))
- (via (at 73.14946 46.8757) (size 0.44958) (layers Front Back) (net 3))
- (segment (start 72.82434 46.55058) (end 73.14946 46.8757) (width 0.127) (layer Front) (net 3))
- (segment (start 74.3458 40.01262) (end 74.3458 39.35222) (width 0.127) (layer Back) (net 4) (status 10))
- (segment (start 74.3458 39.35222) (end 73.85558 38.735) (width 0.127) (layer Back) (net 4) (tstamp 59B00F08) (status 20))
- (segment (start 77.8002 45.974) (end 77.43952 45.61332) (width 0.127) (layer Back) (net 5))
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- (segment (start 77.724 45.466) (end 77.37094 45.11294) (width 0.127) (layer Back) (net 6))
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- (via (at 77.8002 44.8564) (size 0.44958) (drill 0.20066) (layers Front Back) (net 7))
- (segment (start 77.8002 44.8564) (end 77.94752 45.00372) (width 0.127) (layer Front) (net 7) (tstamp 59AEEC72))
- (segment (start 79.45882 45.00372) (end 77.94752 45.00372) (width 0.127) (layer Front) (net 7) (tstamp 59AEEC73) (status 10))
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