max7219: Add dumps for MAX7219 chips

diff --git a/spi/max7219/README b/spi/max7219/README
index 001b00b380477923124004f2aa4effb12ead396c..c3b520008db75258f8493e24ca4c65792af1a1fc 100644 (file)
--- a/spi/max7219/README
+++ b/spi/max7219/README
@@ -21,7 +21,7 @@ The logic analyzer used was a Saleae Logic clone (at 2MHz):
   3           CLK
 
 
-Data
+max7219.sr
 ----
 
 The capture was generated using PulseView.
@@ -29,3 +29,16 @@ The capture was generated using PulseView.
 The chip was driven by an FTDI FT232H connected to USB, using a custom Perl
 program to drive the signals, including the intentional error cases.
 
+
+
+max7219_4x_cascaded_chips.sr
+----
+
+MAX7219 settings:
+  Number of daisy-chained chips = 4
+
+The capture was generated using PulseView.
+
+The chip was driven by an Arduino UNO connected to USB, using code from here:
+https://github.com/Sebski123/MAX72xx-Sigrok/blob/master/Sigrok_max7219_test_data.ino
+to drive the signals, including the intentional error cases.

diff --git a/spi/max7219/max7219_4x_cascaded_chips.sr b/spi/max7219/max7219_4x_cascaded_chips.sr
new file mode 100644 (file)
index 0000000..642737e
Binary files /dev/null and b/spi/max7219/max7219_4x_cascaded_chips.sr differ