This is managed by the backend and should be read-only for PDs.
def reset(self):
self.samplerate = None
- self.samplenum = None
self.edges, self.bits, self.ss_es_bits = [], [], []
self.state = 'IDLE'
self.dev_type = None
def reset(self):
self.samplerate = None
- self.samplenum = None
self.edges, self.bits, self.ss_es_bits = [], [], []
self.state = 'IDLE'
def reset(self):
self.samplerate = None
- self.samplenum = None
self.edges, self.bits, self.ss_es_bits = [], [], []
self.state = 'IDLE'
def reset(self):
self.samplerate = None
- self.samplenum = None
self.edges, self.deltas, self.bits = [], [], []
self.state = 'IDLE'
self.mode = 0
def reset(self):
self.state = 'IDLE'
self.oldlclk = -1
- self.samplenum = 0
self.lad = -1
self.addr = 0
self.cur_nibble = 0
def reset(self):
self.illegal_bus = 0
- self.samplenum = -1
self.clause45_addr = -1 # Clause 45 is context sensitive.
self.reset_decoder_state()
def reset(self):
self.bits = []
- self.samplenum = 0
self.bitcount = 0
def start(self):
self.misobytes = []
self.mosibytes = []
self.ss_block = -1
- self.samplenum = -1
self.ss_transfer = -1
self.cs_was_deasserted = False
self.have_cs = self.have_miso = self.have_mosi = None
def reset(self):
self.samplerate = None
- self.samplenum = 0
self.frame_start = [-1, -1]
self.frame_valid = [None, None]
self.startbit = [-1, -1]
self.samplerate = None
self.oldsym = 'J' # The "idle" state is J.
self.ss_block = None
- self.samplenum = 0
self.bitrate = None
self.bitwidth = None
self.samplepos = None