elif pidname in ('ACK', 'NAK', 'STALL', 'NYET', 'ERR'):
pass # Nothing to do, these only have SYNC+PID+EOP fields.
elif pidname in ('PRE'):
- pass # Nothing to do, PRE only has SYNC+PID fields.
+ pass # Nothing to do, PRE only has SYNC+PID fields.
else:
pass # TODO: Handle 'SPLIT' and possibly 'Reserved' packets.
# Issue PCAP 'SUBMIT' packet.
ts = self.ts_from_samplenum(ss)
pkt = pcap_usb_pkt(request, ts, True)
- self.putb(ss, (0, pkt.record_header()))
- self.putb(ss, (0, pkt.packet()))
+ self.putb(ss, [0, pkt.record_header()])
+ self.putb(ss, [0, pkt.packet()])
if request_end == 1:
# Write annotation.
# Issue PCAP 'COMPLETE' packet.
ts = self.ts_from_samplenum(es)
pkt = pcap_usb_pkt(request, ts, False)
- self.putb(ss, (0, pkt.record_header()))
- self.putb(ss, (0, pkt.packet()))
+ self.putb(ss, [0, pkt.record_header()])
+ self.putb(ss, [0, pkt.packet()])
del self.request[(addr, ep)]
def decode(self, ss, es, data):
return
if self.transaction_state == 'TOKEN RECEIVED':
transaction_timeout = self.transaction_es
- # token length is 35 bits, timeout is 16..18 bit times (USB 2.0 7.1.19.1)
+ # Token length is 35 bits, timeout is 16..18 bit times
+ # (USB 2.0 7.1.19.1).
transaction_timeout += int((self.transaction_es - self.transaction_ss) / 2)
- if (ss > transaction_timeout):
+ if ss > transaction_timeout:
self.transaction_es = transaction_timeout
self.handshake = 'timeout'
self.handle_transfer()
(0, 1): 'LS_J',
(1, 1): 'SE1',
},
-# After a PREamble PID, the bus segment between Host and Hub uses LS signalling
-# rate and FS signalling polarity (USB 2.0 spec, 11.8.4: "For both upstream and
-# downstream low-speed data, the hub is responsible for inverting the polarity of
-# the data before transmitting to/from a low-speed port."
+ # After a PREamble PID, the bus segment between Host and Hub uses LS
+ # signalling rate and FS signalling polarity (USB 2.0 spec, 11.8.4: "For
+ # both upstream and downstream low-speed data, the hub is responsible for
+ # inverting the polarity of the data before transmitting to/from a
+ # low-speed port.").
'low-speed-rp': {
# (<dp>, <dm>): <symbol/state>
(0, 0): 'SE0',
}
bitrates = {
- 'low-speed': 1500000, # 1.5Mb/s (+/- 1.5%)
- 'low-speed-rp': 1500000, # 1.5Mb/s (+/- 1.5%)
+ 'low-speed': 1500000, # 1.5Mb/s (+/- 1.5%)
+ 'low-speed-rp': 1500000, # 1.5Mb/s (+/- 1.5%)
'full-speed': 12000000, # 12Mb/s (+/- 0.25%)
'automatic': None
}
if sym != 'K' or self.oldsym != 'J':
return
self.consecutive_ones = 0
- self.bits = ""
+ self.bits = ''
self.update_bitrate()
self.samplepos = self.samplenum - (self.bitwidth / 2) + 0.5
self.set_new_target_samplenum()