srd: SPI: probes[]: Add missing MISO and CS lines.

diff --git a/decoders/spi.py b/decoders/spi.py
index 5903059268a406979405aea15cd03d14f0073b9e..d4744a004536fd6a218831088df90d6b77932873 100644 (file)
--- a/decoders/spi.py
+++ b/decoders/spi.py
@@ -34,7 +34,10 @@ class Decoder(srd.Decoder):
     probes = [
         {'id': 'mosi', 'name': 'MOSI',
          'desc': 'SPI MOSI line (Master out, slave in)'},
+        {'id': 'miso', 'name': 'MISO',
+         'desc': 'SPI MISO line (Master in, slave out)'},
         {'id': 'sck', 'name': 'CLK', 'desc': 'SPI clock line'},
+        {'id': 'cs', 'name': 'CS#', 'desc': 'SPI CS (chip select) line'},
     ]
     options = {}
     annotations = [