# State machine.
if self.state == 'WAIT FOR FALLING EDGE':
# The start of a cycle is a falling edge.
- if owr == 0:
- # Save the sample number for the falling edge.
- self.fall = self.samplenum
- # Go to waiting for sample time.
- self.state = 'WAIT FOR DATA SAMPLE'
+ if owr != 0:
+ continue
+ # Save the sample number for the falling edge.
+ self.fall = self.samplenum
+ # Go to waiting for sample time.
+ self.state = 'WAIT FOR DATA SAMPLE'
elif self.state == 'WAIT FOR DATA SAMPLE':
# Sample data bit.
t = self.samplenum - self.fall
# A data slot ends in a recovery period, otherwise, this is
# probably a reset.
t = self.samplenum - self.fall
- if t == self.cnt_slot[self.overdrive]:
- if owr:
- self.put(self.fall, self.samplenum, self.out_ann,
- [0, ['BIT: %01x' % self.bit]])
- self.put(self.fall, self.samplenum, self.out_proto,
- ['BIT', self.bit])
+ if t != self.cnt_slot[self.overdrive]:
+ continue
+
+ if owr == 0:
+ # This seems to be a reset slot, wait for its end.
+ self.state = 'WAIT FOR RISING EDGE'
+ continue
+
+ self.put(self.fall, self.samplenum, self.out_ann,
+ [0, ['BIT: %01x' % self.bit]])
+ self.put(self.fall, self.samplenum, self.out_proto,
+ ['BIT', self.bit])
- # Checking the first command to see if overdrive mode
- # should be entered.
- if self.bit_cnt <= 8:
- self.command |= (self.bit << self.bit_cnt)
- elif self.bit_cnt == 8 and self.command in [0x3c, 0x69]:
- self.put(self.fall, self.cnt_bit[self.overdrive],
- self.out_ann,
- [0, ['ENTER OVERDRIVE MODE']])
- # Increment the bit counter.
- self.bit_cnt += 1
- # Wait for next slot.
- self.state = 'WAIT FOR FALLING EDGE'
- else:
- # This seems to be a reset slot, wait for its end.
- self.state = 'WAIT FOR RISING EDGE'
+ # Checking the first command to see if overdrive mode
+ # should be entered.
+ if self.bit_cnt <= 8:
+ self.command |= (self.bit << self.bit_cnt)
+ elif self.bit_cnt == 8 and self.command in [0x3c, 0x69]:
+ self.put(self.fall, self.cnt_bit[self.overdrive],
+ self.out_ann, [0, ['ENTER OVERDRIVE MODE']])
+ # Increment the bit counter.
+ self.bit_cnt += 1
+ # Wait for next slot.
+ self.state = 'WAIT FOR FALLING EDGE'
elif self.state == 'WAIT FOR RISING EDGE':
# The end of a cycle is a rising edge.
- if owr:
- # Check if this was a reset cycle.
- t = self.samplenum - self.fall
- if t > self.cnt_normal_reset:
- # Save the sample number for the falling edge.
- self.rise = self.samplenum
- self.state = 'WAIT FOR PRESENCE DETECT'
- # Exit overdrive mode.
- if self.overdrive:
- self.put(self.fall, self.cnt_bit[self.overdrive],
- self.out_ann, [0, ['EXIT OVERDRIVE MODE']])
- self.overdrive = 0
- # Clear command bit counter and data register.
- self.bit_cnt = 0
- self.command = 0
- elif (t > self.cnt_overdrive_reset) and self.overdrive:
- # Save the sample number for the falling edge.
- self.rise = self.samplenum
- self.state = "WAIT FOR PRESENCE DETECT"
- # Otherwise this is assumed to be a data bit.
- else:
- self.state = "WAIT FOR FALLING EDGE"
+ if owr != 1:
+ continue
+
+ # Check if this was a reset cycle.
+ t = self.samplenum - self.fall
+ if t > self.cnt_normal_reset:
+ # Save the sample number for the falling edge.
+ self.rise = self.samplenum
+ self.state = 'WAIT FOR PRESENCE DETECT'
+ # Exit overdrive mode.
+ if self.overdrive:
+ self.put(self.fall, self.cnt_bit[self.overdrive],
+ self.out_ann, [0, ['EXIT OVERDRIVE MODE']])
+ self.overdrive = 0
+ # Clear command bit counter and data register.
+ self.bit_cnt = 0
+ self.command = 0
+ elif (t > self.cnt_overdrive_reset) and self.overdrive:
+ # Save the sample number for the falling edge.
+ self.rise = self.samplenum
+ self.state = "WAIT FOR PRESENCE DETECT"
+ # Otherwise this is assumed to be a data bit.
+ else:
+ self.state = "WAIT FOR FALLING EDGE"
elif self.state == 'WAIT FOR PRESENCE DETECT':
# Sample presence status.
t = self.samplenum - self.rise
self.present = owr
self.state = 'WAIT FOR RESET SLOT END'
elif self.state == 'WAIT FOR RESET SLOT END':
- # A reset slot ends in a long recovery period
+ # A reset slot ends in a long recovery period.
t = self.samplenum - self.rise
- if t == self.cnt_reset[self.overdrive]:
- if owr:
- self.put(self.fall, self.samplenum, self.out_ann,
- [0, ['RESET/PRESENCE: %s'
- % ('False' if self.present else 'True')]])
- self.put(self.fall, self.samplenum, self.out_proto,
- ['RESET/PRESENCE', not self.present])
- # Wait for next slot.
- self.state = 'WAIT FOR FALLING EDGE'
- else:
- # This seems to be a reset slot, wait for its end.
- self.state = 'WAIT FOR RISING EDGE'
+ if t != self.cnt_reset[self.overdrive]:
+ continue
+
+ if owr == 0:
+ # This seems to be a reset slot, wait for its end.
+ self.state = 'WAIT FOR RISING EDGE'
+ continue
+
+ self.put(self.fall, self.samplenum, self.out_ann,
+ [0, ['RESET/PRESENCE: %s'
+ % ('False' if self.present else 'True')]])
+ self.put(self.fall, self.samplenum, self.out_proto,
+ ['RESET/PRESENCE', not self.present])
+ # Wait for next slot.
+ self.state = 'WAIT FOR FALLING EDGE'
else:
raise Exception('Invalid state: %s' % self.state)
def __init__(self, **kwargs):
# Event timing variables
- self.net_beg = 0
- self.net_end = 0
+ self.beg = 0
+ self.end = 0
# Network layer variables
self.state = 'COMMAND'
self.bit_cnt = 0
self.data_p = 0x0
self.data_n = 0x0
self.data = 0x0
- self.net_rom = 0x0000000000000000
+ self.rom = 0x0000000000000000
def start(self, metadata):
self.out_proto = self.add(srd.OUTPUT_PROTO, 'onewire_network')
def putx(self, data):
# Helper function for most annotations.
- self.put(self.net_beg, self.net_end, self.out_ann, data)
+ self.put(self.beg, self.end, self.out_ann, data)
def puty(self, data):
# Helper function for most protocol packets.
- self.put(self.net_beg, self.net_end, self.out_proto, data)
+ self.put(self.beg, self.end, self.out_proto, data)
def decode(self, ss, es, data):
code, val = data
[0, ['RESET/PRESENCE: %s' % ('True' if val else 'False')]])
self.put(ss, es, self.out_proto, ['RESET/PRESENCE', val])
self.state = 'COMMAND'
- elif code == 'BIT':
- if self.state == 'COMMAND':
- # Receiving and decoding a ROM command.
- if self.onewire_collect(8, val, ss, es):
- if self.data in command:
- self.putx([0, ['ROM COMMAND: 0x%02x \'%s\''
- % (self.data, command[self.data][0])]])
- self.state = command[self.data][1]
- else:
- self.putx([0, ['ROM COMMAND: 0x%02x \'%s\''
- % (self.data, 'UNRECOGNIZED')]])
- self.state = 'COMMAND ERROR'
- elif self.state == 'GET ROM':
- # A 64 bit device address is selected.
- # Family code (1B) + serial number (6B) + CRC (1B)
- if self.onewire_collect(64, val, ss, es):
- self.net_rom = self.data & 0xffffffffffffffff
- self.putx([0, ['ROM: 0x%016x' % self.net_rom]])
- self.puty(['ROM', self.net_rom])
- self.state = 'TRANSPORT'
- elif self.state == 'SEARCH ROM':
- # A 64 bit device address is searched for.
- # Family code (1B) + serial number (6B) + CRC (1B)
- if self.onewire_search(64, val, ss, es):
- self.net_rom = self.data & 0xffffffffffffffff
- self.putx([0, ['ROM: 0x%016x' % self.net_rom]])
- self.puty(['ROM', self.net_rom])
- self.state = 'TRANSPORT'
- elif self.state == 'TRANSPORT':
- # The transport layer is handled in byte sized units.
- if self.onewire_collect(8, val, ss, es):
- self.putx([0, ['DATA: 0x%02x' % self.data]])
- self.puty(['DATA', self.data])
- elif self.state == 'COMMAND ERROR':
- # Since the command is not recognized, print raw data.
- if self.onewire_collect(8, val, ss, es):
- self.putx([0, ['ROM ERROR DATA: 0x%02x' % self.data]])
+ return
+
+ # For now we're only interested in 'RESET/PRESENCE' and 'BIT' packets.
+ if code != 'BIT':
+ return
+
+ if self.state == 'COMMAND':
+ # Receiving and decoding a ROM command.
+ if self.onewire_collect(8, val, ss, es) == 0:
+ return
+ if self.data in command:
+ self.putx([0, ['ROM COMMAND: 0x%02x \'%s\''
+ % (self.data, command[self.data][0])]])
+ self.state = command[self.data][1]
else:
- raise Exception('Invalid state: %s' % self.state)
+ self.putx([0, ['ROM COMMAND: 0x%02x \'%s\''
+ % (self.data, 'UNRECOGNIZED')]])
+ self.state = 'COMMAND ERROR'
+ elif self.state == 'GET ROM':
+ # A 64 bit device address is selected.
+ # Family code (1B) + serial number (6B) + CRC (1B)
+ if self.onewire_collect(64, val, ss, es) == 0:
+ return
+ self.rom = self.data & 0xffffffffffffffff
+ self.putx([0, ['ROM: 0x%016x' % self.rom]])
+ self.puty(['ROM', self.rom])
+ self.state = 'TRANSPORT'
+ elif self.state == 'SEARCH ROM':
+ # A 64 bit device address is searched for.
+ # Family code (1B) + serial number (6B) + CRC (1B)
+ if self.onewire_search(64, val, ss, es) == 0:
+ return
+ self.rom = self.data & 0xffffffffffffffff
+ self.putx([0, ['ROM: 0x%016x' % self.rom]])
+ self.puty(['ROM', self.rom])
+ self.state = 'TRANSPORT'
+ elif self.state == 'TRANSPORT':
+ # The transport layer is handled in byte sized units.
+ if self.onewire_collect(8, val, ss, es) == 0:
+ return
+ self.putx([0, ['DATA: 0x%02x' % self.data]])
+ self.puty(['DATA', self.data])
+ elif self.state == 'COMMAND ERROR':
+ # Since the command is not recognized, print raw data.
+ if self.onewire_collect(8, val, ss, es) == 0:
+ return
+ self.putx([0, ['ROM ERROR DATA: 0x%02x' % self.data]])
+ else:
+ raise Exception('Invalid state: %s' % self.state)
- # Link/Network layer data collector.
+ # Data collector.
def onewire_collect(self, length, val, ss, es):
# Storing the sample this sequence begins with.
if self.bit_cnt == 1:
- self.net_beg = ss
+ self.beg = ss
self.data = self.data & ~(1 << self.bit_cnt) | (val << self.bit_cnt)
self.bit_cnt += 1
# Storing the sample this sequence ends with.
# In case the full length of the sequence is received, return 1.
if self.bit_cnt == length:
- self.net_end = es
+ self.end = es
self.data = self.data & ((1 << length) - 1)
self.bit_cnt = 0
return 1
else:
return 0
- # Link/Network layer search collector.
+ # Search collector.
def onewire_search(self, length, val, ss, es):
# Storing the sample this sequence begins with.
if (self.bit_cnt == 0) and (self.search == 'P'):
- self.net_beg = ss
+ self.beg = ss
if self.search == 'P':
# Master receives an original address bit.
# Storing the sample this sequence ends with.
# In case the full length of the sequence is received, return 1.
if self.bit_cnt == length:
- self.net_end = es
+ self.end = es
self.data_p = self.data_p & ((1 << length) - 1)
self.data_n = self.data_n & ((1 << length) - 1)
self.data = self.data & ((1 << length) - 1)
projects / libsigrokdecode.git / commitdiff