rigol-ds: DS1000 series actually use IEEE488.2 data block format.

diff --git a/hardware/rigol-ds/api.c b/hardware/rigol-ds/api.c
index 44847c715be75612d1bc97453ec02f48fd2ea459..2b86e7d2e869d50a5ba41da6131351aee86d1bdf 100644 (file)
--- a/hardware/rigol-ds/api.c
+++ b/hardware/rigol-ds/api.c
@@ -163,12 +163,12 @@ static const char *data_sources[] = {
 #define AGILENT "Agilent Technologies"
 
 static const struct rigol_ds_model supported_models[] = {
-       {RIGOL, "DS1052E", RIGOL_DS1000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
-       {RIGOL, "DS1102E", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
-       {RIGOL, "DS1152E", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
-       {RIGOL, "DS1052D", RIGOL_DS1000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
-       {RIGOL, "DS1102D", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
-       {RIGOL, "DS1152D", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
+       {RIGOL, "DS1052E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
+       {RIGOL, "DS1102E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
+       {RIGOL, "DS1152E", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12},
+       {RIGOL, "DS1052D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
+       {RIGOL, "DS1102D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
+       {RIGOL, "DS1152D", RIGOL_DS1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12},
        {RIGOL, "DS2072", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14},
        {RIGOL, "DS2102", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14},
        {RIGOL, "DS2202", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14},
@@ -464,12 +464,12 @@ static int analog_frame_size(const struct sr_dev_inst *sdi)
        int analog_probes = 0;
        GSList *l;
 
-       if (devc->model->protocol == PROTOCOL_LEGACY) {
-               if (devc->model->series == RIGOL_VS5000)
-                       return VS5000_ANALOG_LIVE_WAVEFORM_SIZE;
-               else
-                       return DS1000_ANALOG_LIVE_WAVEFORM_SIZE;
-       } else {
+       switch (devc->model->series) {
+       case RIGOL_VS5000:
+               return VS5000_ANALOG_LIVE_WAVEFORM_SIZE;
+       case RIGOL_DS1000:
+               return DS1000_ANALOG_LIVE_WAVEFORM_SIZE;
+       default:
                for (l = sdi->probes; l; l = l->next) {
                        probe = l->data;
                        if (probe->type == SR_PROBE_ANALOG && probe->enabled)
@@ -675,7 +675,7 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi,
                        devc->data_source = DATA_SOURCE_LIVE;
                else if (!strcmp(tmp_str, "Memory"))
                        devc->data_source = DATA_SOURCE_MEMORY;
-               else if (devc->model->protocol == PROTOCOL_IEEE488_2
+               else if (devc->model->series >= RIGOL_DS1000Z
                         && !strcmp(tmp_str, "Segmented"))
                        devc->data_source = DATA_SOURCE_SEGMENTED;
                else
@@ -891,7 +891,7 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data)
        devc->analog_frame_size = analog_frame_size(sdi);
        devc->digital_frame_size = digital_frame_size(sdi);
 
-       if (devc->model->protocol == PROTOCOL_LEGACY) {
+       if (devc->model->series < RIGOL_DS1000Z) {
                /* Fetch the first frame. */
                if (rigol_ds_channel_start(sdi) != SR_OK)
                        return SR_ERR;

diff --git a/hardware/rigol-ds/protocol.c b/hardware/rigol-ds/protocol.c
index 9b2dd68d5cf80846ce4c9f92623249c2830090d4..81f0e87ed91a00f41c79f0dfb0f6de2305715544 100644 (file)
--- a/hardware/rigol-ds/protocol.c
+++ b/hardware/rigol-ds/protocol.c
@@ -331,7 +331,7 @@ SR_PRIV int rigol_ds_channel_start(const struct sr_dev_inst *sdi)
 
        sr_dbg("Starting reading data from channel %d", probe->index + 1);
 
-       if (devc->model->protocol == PROTOCOL_LEGACY) {
+       if (devc->model->series < RIGOL_DS1000Z) {
                if (probe->type == SR_PROBE_LOGIC) {
                        if (sr_scpi_send(sdi->conn, ":WAV:DATA? DIG") != SR_OK)
                                return SR_ERR;
@@ -419,8 +419,8 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
        scpi = sdi->conn;
 
        if (revents == G_IO_IN || revents == 0) {
-               if (devc->model->protocol == PROTOCOL_IEEE488_2) {
-                       switch (devc->wait_event) {
+               if (devc->model->series >= RIGOL_DS1000Z) {
+                       switch(devc->wait_event) {
                        case WAIT_NONE:
                                break;
                        case WAIT_TRIGGER:
@@ -449,7 +449,7 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
                probe = devc->channel_entry->data;
                
                if (devc->num_block_bytes == 0 &&
-                   devc->model->protocol == PROTOCOL_IEEE488_2) {
+                   devc->model->series >= RIGOL_DS1000Z) {
                                if (sr_scpi_send(sdi->conn, ":WAV:DATA?") != SR_OK)
                                        return TRUE;
                }
@@ -502,7 +502,7 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
                        vref = devc->vert_reference[probe->index];
                        vdiv = devc->vdiv[probe->index] / 25.6;
                        offset = devc->vert_offset[probe->index];
-                       if (devc->model->protocol == PROTOCOL_IEEE488_2)
+                       if (devc->model->series >= RIGOL_DS1000Z)
                                for (i = 0; i < len; i++)
                                        devc->data[i] = ((int)devc->buffer[i] - vref) * vdiv - offset;
                        else
@@ -519,9 +519,9 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
                        sr_session_send(cb_data, &packet);
                        g_slist_free(analog.probes);
                } else {
-                       logic.length = len - 10;
+                       logic.length = len;
                        logic.unitsize = 2;
-                       logic.data = devc->buffer + 10;
+                       logic.data = devc->buffer;
                        packet.type = SR_DF_LOGIC;
                        packet.payload = &logic;
                        sr_session_send(cb_data, &packet);
@@ -529,10 +529,12 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
 
                if (devc->num_block_read == devc->num_block_bytes) {
                        sr_dbg("Block has been completed");
-                       if (devc->model->protocol == PROTOCOL_IEEE488_2) {
-                               /* Discard the terminating linefeed and prepare for
-                                  possible next block */
+                       if (devc->model->series >= RIGOL_DS1000Z) {
+                               /* Discard the terminating linefeed */
                                sr_scpi_read_data(scpi, (char *)devc->buffer, 1);
+                       }
+                       if (devc->model->protocol == PROTOCOL_IEEE488_2) {
+                               /* Prepare for possible next block */
                                devc->num_block_bytes = 0;
                                if (devc->data_source != DATA_SOURCE_LIVE)
                                        rigol_ds_set_wait_event(devc, WAIT_BLOCK);
@@ -558,7 +560,7 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
                sr_dbg("Frame completed, %d samples", devc->num_frame_samples);
                packet.type = SR_DF_FRAME_END;
                sr_session_send(sdi, &packet);
-               if (devc->model->protocol == PROTOCOL_IEEE488_2) {
+               if (devc->model->series >= RIGOL_DS1000Z) {
                        /* Signal end of data download to scope */
                        if (devc->data_source != DATA_SOURCE_LIVE)
                                /*
@@ -591,7 +593,7 @@ SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data)
                                else
                                        devc->channel_entry = devc->enabled_digital_probes;
 
-                               if (devc->model->protocol == PROTOCOL_LEGACY)
+                               if (devc->model->series < RIGOL_DS1000Z)
                                        rigol_ds_channel_start(sdi);
                                else
                                        rigol_ds_capture_start(sdi);
@@ -616,7 +618,7 @@ static int get_cfg(const struct sr_dev_inst *sdi, char *cmd, char *reply, size_t
        g_free(response);
        len = strlen(reply);
 
-       if (devc->model->protocol == PROTOCOL_IEEE488_2) {
+       if (devc->model->series >= RIGOL_DS1000Z) {
                /* get rid of trailing linefeed */
                if (len >= 1 && reply[len-1] == '\n')
                        reply[len-1] = '\0';
@@ -725,7 +727,7 @@ SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi)
                sr_dbg("CH%d %g", i + 1, devc->vdiv[i]);
 
        sr_dbg("Current vertical reference:");
-       if (devc->model->protocol == PROTOCOL_IEEE488_2) {
+       if (devc->model->series >= RIGOL_DS1000Z) {
                /* Vertical reference - not certain if this is the place to read it. */
                for (i = 0; i < devc->model->analog_channels; i++) {
                        if (sr_scpi_send(sdi->conn, ":WAV:SOUR CHAN%d", i + 1) != SR_OK)

diff --git a/hardware/rigol-ds/protocol.h b/hardware/rigol-ds/protocol.h
index f19bf75b0bdaf66e407a294fdcdf0498ce8dd9be..4d502a5a8b0e25e8d78c23a4bbdd65edee30f3f6 100644 (file)
--- a/hardware/rigol-ds/protocol.h
+++ b/hardware/rigol-ds/protocol.h
@@ -47,12 +47,12 @@
 #define MAX_DIGITAL_PROBES 16
 
 enum rigol_ds_series {
+       RIGOL_VS5000,
        RIGOL_DS1000,
        RIGOL_DS1000Z,
        RIGOL_DS2000,
        RIGOL_DS4000,
        RIGOL_DS6000,
-       RIGOL_VS5000,
        AGILENT_DSO1000,
 };