This commit implements DSLogic trigger functionality.
The following triggers are working:
- trigger on rising edge
- trigger on falling edge
- trigger on any edge
- trigger on logic one
- trigger on logic zero
Pre-trigger capture ratio is also working.
Signed-off-by: Diego Asanza <redacted>
Tested-by: Andrew Bradford <redacted>
devc->acq_aborted = FALSE;
devc->empty_transfer_count = 0;
- if ((trigger = sr_session_trigger_get(sdi->session))) {
+ if ((trigger = sr_session_trigger_get(sdi->session)) && !devc->dslogic) {
int pre_trigger_samples = 0;
if (devc->limit_samples > 0)
pre_trigger_samples = devc->capture_ratio * devc->limit_samples/100;
} else if (transfer->status == LIBUSB_TRANSFER_COMPLETED
&& transfer->actual_length == sizeof(struct dslogic_trigger_pos)) {
tpos = (struct dslogic_trigger_pos *)transfer->buffer;
- sr_dbg("tpos real_pos %.8x ram_saddr %.8x", tpos->real_pos, tpos->ram_saddr);
+ sr_info("tpos real_pos %d ram_saddr %d", tpos->real_pos, tpos->ram_saddr);
+ devc->trigger_pos = tpos->real_pos;
g_free(tpos);
start_transfers(sdi);
}
-
libusb_free_transfer(transfer);
}
struct sr_trigger *trigger;
struct sr_trigger_stage *stage;
struct sr_trigger_match *match;
+
struct dev_context *devc;
+ devc = sdi->priv;
const GSList *l, *m;
int channelbit, i = 0;
uint16_t v16;
- devc = sdi->priv;
- devc->trigger_en = FALSE;
-
cfg->trig_mask0[0] = 0xffff;
cfg->trig_mask1[0] = 0xffff;
cfg->trig_count0[0] = 0;
cfg->trig_count1[0] = 0;
- if (!(trigger = sr_session_trigger_get(sdi->session)))
+ cfg->trig_pos = 0;
+ cfg->trig_sda = 0;
+ cfg->trig_glb = 0;
+ cfg->trig_adp = cfg->count - cfg->trig_pos - 1;
+
+ for (i = 1; i < 16; i++) {
+ cfg->trig_mask0[i] = 0xff;
+ cfg->trig_mask1[i] = 0xff;
+ cfg->trig_value0[i] = 0;
+ cfg->trig_value1[i] = 0;
+ cfg->trig_edge0[i] = 0;
+ cfg->trig_edge1[i] = 0;
+ cfg->trig_count0[i] = 0;
+ cfg->trig_count1[i] = 0;
+ cfg->trig_logic0[i] = 2;
+ cfg->trig_logic1[i] = 2;
+ }
+
+ cfg->trig_pos = (uint32_t)(devc->capture_ratio / 100.0 * devc->limit_samples);
+ sr_dbg("pos: %d", cfg->trig_pos);
+
+ sr_dbg("configuring trigger");
+
+ if (!(trigger = sr_session_trigger_get(sdi->session))){
+ sr_dbg("No session trigger found");
return SR_OK;
+ }
for (l = trigger->stages; l; l = l->next) {
stage = l->data;
/* Ignore disabled channels with a trigger. */
continue;
channelbit = 1 << (match->channel->index);
- devc->trigger_en = TRUE; /* Triggered. */
/* Simple trigger support (event). */
if (match->match == SR_TRIGGER_ONE) {
cfg->trig_mask0[0] &= ~channelbit;
cfg->trig_value1[0] |= channelbit;
cfg->trig_edge0[0] |= channelbit;
cfg->trig_edge1[0] |= channelbit;
- } else if (match->match == SR_TRIGGER_EDGE){
+ } else if(match->match == SR_TRIGGER_EDGE){
cfg->trig_edge0[0] |= channelbit;
cfg->trig_edge1[0] |= channelbit;
}
}
}
-
- if (devc->trigger_en) {
- for (i = 1; i < 16; i++) {
- cfg->trig_mask0[i] = 0xff;
- cfg->trig_mask1[i] = 0xff;
- cfg->trig_value0[i] = 0;
- cfg->trig_value1[i] = 0;
- cfg->trig_edge0[i] = 0;
- cfg->trig_edge1[i] = 0;
- cfg->trig_count0[i] = 0;
- cfg->trig_count1[i] = 0;
- cfg->trig_logic0[i] = 2;
- cfg->trig_logic1[i] = 2;
- }
- v16 = RL16(&cfg->mode);
- v16 |= 1 << 0;
- WL16(&cfg->mode, v16);
- }
-
+ v16 = RL16(&cfg->mode);
+ v16 |= 1 << 0;
+ WL16(&cfg->mode, v16);
return SR_OK;
}
+
SR_PRIV int dslogic_fpga_configure(const struct sr_dev_inst *sdi)
{
struct dev_context *devc;
v16 = 1 << 14;
else if (devc->dslogic_mode == DS_OP_LOOPBACK_TEST)
v16 = 1 << 13;
- //if (devc->dslogic_external_clock)
- // v16 |= 1 << 1;
- //v16 |= 1 << 0;
+ if (devc->dslogic_external_clock)
+ v16 |= 1 << 1;
WL16(&cfg.mode, v16);
v32 = ceil(SR_MHZ(100) * 1.0 / devc->cur_samplerate);
WL32(&cfg.divider, v32);
struct dslogic_trigger_pos {
uint32_t real_pos;
uint32_t ram_saddr;
- uint8_t first_block[504];
+ uint32_t remain_cnt;
+ uint8_t first_block[500];
};
/*
devc->limit_samples = 0;
devc->capture_ratio = 0;
devc->sample_wide = FALSE;
- devc->trigger_en = FALSE;
devc->stl = NULL;
return devc;
struct sr_dev_inst *sdi;
struct dev_context *devc;
gboolean packet_has_error = FALSE;
+ struct sr_datafeed_packet packet;
unsigned int num_samples;
int trigger_offset, cur_sample_count, unitsize;
int pre_trigger_samples;
} else {
devc->empty_transfer_count = 0;
}
- if (devc->trigger_en)
- devc->trigger_fired = TRUE;
if (devc->trigger_fired) {
if (!devc->limit_samples || devc->sent_samples < devc->limit_samples) {
/* Send the incoming transfer to the session bus. */
else
num_samples = cur_sample_count;
- devc->send_data_proc(sdi, (uint8_t *)transfer->buffer,
- num_samples * unitsize, unitsize);
- devc->sent_samples += num_samples;
+ if(devc->dslogic && devc->trigger_pos > devc->sent_samples
+ && devc->trigger_pos <= devc->sent_samples + num_samples){
+ /* dslogic trigger in this block. Send trigger position */
+ trigger_offset = devc->trigger_pos - devc->sent_samples;
+ /* pre-trigger samples */
+ devc->send_data_proc(sdi, (uint8_t *)transfer->buffer,
+ trigger_offset * unitsize, unitsize);
+ devc->sent_samples += trigger_offset;
+ /* trigger position */
+ devc->trigger_pos = 0;
+ packet.type = SR_DF_TRIGGER;
+ packet.payload = NULL;
+ sr_session_send(sdi, &packet);
+ /* post trigger samples */
+ num_samples -= trigger_offset;
+ devc->send_data_proc(sdi, (uint8_t *)transfer->buffer
+ + trigger_offset * unitsize, num_samples * unitsize, unitsize);
+ devc->sent_samples += num_samples;
+ }else{
+ devc->send_data_proc(sdi, (uint8_t *)transfer->buffer,
+ num_samples * unitsize, unitsize);
+ devc->sent_samples += num_samples;
+ }
}
} else {
trigger_offset = soft_trigger_logic_check(devc->stl,
/* Is this a DSLogic? */
gboolean dslogic;
uint16_t dslogic_mode;
+ uint32_t trigger_pos;
int dslogic_external_clock;
- gboolean trigger_en;
};
SR_PRIV int fx2lafw_command_start_acquisition(const struct sr_dev_inst *sdi);