REG_DIV_BYPASS = 0x1094, /* bypass clock divider flag */
- REG_CMD_CTRL1 = 0x10B0, /* command control ??? */
- REG_CMD_CTRL2 = 0x10B4, /* command control ??? */
- REG_CMD_CTRL3 = 0x10B8, /* command control ??? */
- REG_CMD_CTRL4 = 0x10BC, /* command control ??? */
+ REG_LONG_STROBE = 0x10B0, /* long register read/write strobe */
+ REG_LONG_ADDR = 0x10B4, /* long register address */
+ REG_LONG_LOW = 0x10B8, /* long register low word */
+ REG_LONG_HIGH = 0x10BC, /* long register high word */
REG_FREQ_CH1 = 0x10C0, /* channel 1 live frequency */
REG_FREQ_CH2 = 0x10C4, /* channel 2 live frequency */
regvals = devc->reg_write_seq;
- regvals[0].reg = REG_CMD_CTRL2;
+ regvals[0].reg = REG_LONG_ADDR;
regvals[0].val = 10;
- regvals[1].reg = REG_CMD_CTRL3;
+ regvals[1].reg = REG_LONG_LOW;
regvals[1].val = 0;
- regvals[2].reg = REG_CMD_CTRL4;
+ regvals[2].reg = REG_LONG_HIGH;
regvals[2].val = 0;
- regvals[3].reg = REG_CMD_CTRL1;
+ regvals[3].reg = REG_LONG_STROBE;
regvals[3].val = 0;
regvals[4].reg = REG_DIV_BYPASS;
if (ret != SR_OK)
return ret;
- ret = lwla_write_reg(sdi->conn, REG_CMD_CTRL2, 100);
+ ret = lwla_write_reg(sdi->conn, REG_LONG_ADDR, 100);
if (ret != SR_OK)
return ret;
- ret = lwla_read_reg(sdi->conn, REG_CMD_CTRL1, &value);
+ ret = lwla_read_reg(sdi->conn, REG_LONG_STROBE, &value);
if (ret != SR_OK)
return ret;
sr_dbg("Received test word 0x%08X back.", value);
if (value != 0x12345678)
return SR_ERR;
- ret = lwla_read_reg(sdi->conn, REG_CMD_CTRL4, &value);
+ ret = lwla_read_reg(sdi->conn, REG_LONG_HIGH, &value);
if (ret != SR_OK)
return ret;
sr_dbg("Received test word 0x%08X back.", value);
if (value != 0x12345678)
return SR_ERR;
- ret = lwla_read_reg(sdi->conn, REG_CMD_CTRL3, &value);
+ ret = lwla_read_reg(sdi->conn, REG_LONG_LOW, &value);
if (ret != SR_OK)
return ret;
sr_dbg("Received test word 0x%08X back.", value);
regvals[1].reg = REG_MEM_CTRL2;
regvals[1].val = 1;
- regvals[2].reg = REG_CMD_CTRL2;
+ regvals[2].reg = REG_LONG_ADDR;
regvals[2].val = 10;
- regvals[3].reg = REG_CMD_CTRL3;
+ regvals[3].reg = REG_LONG_LOW;
regvals[3].val = 0x74;
- regvals[4].reg = REG_CMD_CTRL4;
+ regvals[4].reg = REG_LONG_HIGH;
regvals[4].val = 0;
- regvals[5].reg = REG_CMD_CTRL1;
+ regvals[5].reg = REG_LONG_STROBE;
regvals[5].val = 0;
regvals[6].reg = REG_DIV_BYPASS;
regvals = devc->reg_write_seq;
- regvals[0].reg = REG_CMD_CTRL2;
+ regvals[0].reg = REG_LONG_ADDR;
regvals[0].val = 10;
- regvals[1].reg = REG_CMD_CTRL3;
+ regvals[1].reg = REG_LONG_LOW;
regvals[1].val = 1;
- regvals[2].reg = REG_CMD_CTRL4;
+ regvals[2].reg = REG_LONG_HIGH;
regvals[2].val = 0;
- regvals[3].reg = REG_CMD_CTRL1;
+ regvals[3].reg = REG_LONG_STROBE;
regvals[3].val = 0;
devc->reg_write_pos = 0;