(general
(links 81)
- (no_connects 7)
- (area 47.519771 26.95194 88.773 68.877542)
+ (no_connects 15)
+ (area 67.688459 37.736779 80.713581 50.761901)
(thickness 1.6002)
(drawings 8)
- (tracks 261)
+ (tracks 247)
(zones 0)
(modules 28)
(nets 23)
)
(net 0 "")
- (net 1 +3.3V)
- (net 2 +5V)
- (net 3 /DM)
- (net 4 /DP)
- (net 5 /PA0)
- (net 6 /PB0)
- (net 7 /PB1)
- (net 8 /PB2)
- (net 9 /PB3)
- (net 10 /PB4)
- (net 11 /PB5)
- (net 12 /PB6)
- (net 13 /PB7)
- (net 14 /RESET#)
- (net 15 /SCL)
- (net 16 /SDA)
- (net 17 /WAKEUP)
- (net 18 /XTALIN)
- (net 19 /XTALOUT)
- (net 20 GND)
- (net 21 N-000005)
- (net 22 N-000044)
+ (net 1 +5V)
+ (net 2 /DM)
+ (net 3 /DP)
+ (net 4 /PA0)
+ (net 5 /PB0)
+ (net 6 /PB1)
+ (net 7 /PB2)
+ (net 8 /PB3)
+ (net 9 /PB4)
+ (net 10 /PB5)
+ (net 11 /PB6)
+ (net 12 /PB7)
+ (net 13 /RESET#)
+ (net 14 /SCL)
+ (net 15 /SDA)
+ (net 16 /WAKEUP)
+ (net 17 /XTALIN)
+ (net 18 /XTALOUT)
+ (net 19 GND)
+ (net 20 +3V3)
+ (net 21 "Net-(C15-Pad1)")
+ (net 22 "Net-(D1-Pad1)")
(net_class Default "This is the default net class."
(clearance 0.1524)
(via_drill 0.20066)
(uvia_dia 0.508)
(uvia_drill 0.127)
- (add_net +3.3V)
+ (add_net +3V3)
(add_net +5V)
(add_net /DM)
(add_net /DP)
(add_net /XTALIN)
(add_net /XTALOUT)
(add_net GND)
- (add_net N-000005)
- (add_net N-000044)
+ (add_net "Net-(C15-Pad1)")
+ (add_net "Net-(D1-Pad1)")
)
(module SOT23-5 (layer Front) (tedit 4FCE8523) (tstamp 4FCBF54B)
(fp_line (start -1.524 0.889) (end -1.524 -0.889) (layer F.SilkS) (width 0.127))
(fp_line (start -1.524 -0.889) (end 1.524 -0.889) (layer F.SilkS) (width 0.127))
(pad 1 smd rect (at -0.9525 1.27 270) (size 0.508 0.762) (layers Front F.Paste F.Mask)
- (net 2 +5V))
+ (net 1 +5V))
(pad 3 smd rect (at 0.9525 1.27 270) (size 0.508 0.762) (layers Front F.Paste F.Mask)
- (net 2 +5V))
+ (net 1 +5V))
(pad 5 smd rect (at -0.9525 -1.27 270) (size 0.508 0.762) (layers Front F.Paste F.Mask)
- (net 1 +3.3V))
+ (net 20 +3V3))
(pad 2 smd rect (at 0 1.27 270) (size 0.508 0.762) (layers Front F.Paste F.Mask)
- (net 20 GND))
+ (net 19 GND))
(pad 4 smd rect (at 0.9525 -1.27 270) (size 0.508 0.762) (layers Front F.Paste F.Mask)
- (net 21 N-000005))
+ (net 21 "Net-(C15-Pad1)"))
(model smd/SOT23_5.wrl
(at (xyz 0 0 0))
(scale (xyz 0.1 0.1 0.1))
(pad "" smd rect (at 0 0 270) (size 4.8006 5.4991) (layers Back B.Paste B.Mask)
(clearance 0.01016))
(pad 28 smd rect (at -3.25374 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
- (net 20 GND) (clearance 0.09906))
+ (net 19 GND) (clearance 0.09906))
(pad 27 smd rect (at -2.75336 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
- (net 1 +3.3V) (clearance 0.09906))
+ (net 20 +3V3) (clearance 0.09906))
(pad 26 smd rect (at -2.25298 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
- (net 20 GND) (clearance 0.09906))
+ (net 19 GND) (clearance 0.09906))
(pad 25 smd rect (at -1.7526 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
- (net 13 /PB7) (clearance 0.09906))
+ (net 12 /PB7) (clearance 0.09906))
(pad 24 smd rect (at -1.25476 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
- (net 12 /PB6) (clearance 0.09906))
+ (net 11 /PB6) (clearance 0.09906))
(pad 23 smd rect (at -0.75438 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
- (net 11 /PB5) (clearance 0.09906))
+ (net 10 /PB5) (clearance 0.09906))
(pad 22 smd rect (at -0.254 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
- (net 10 /PB4) (clearance 0.09906))
+ (net 9 /PB4) (clearance 0.09906))
(pad 21 smd rect (at 0.24638 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
- (net 9 /PB3) (clearance 0.09906))
+ (net 8 /PB3) (clearance 0.09906))
(pad 20 smd rect (at 0.74676 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
- (net 8 /PB2) (clearance 0.09906))
+ (net 7 /PB2) (clearance 0.09906))
(pad 19 smd rect (at 1.24714 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
- (net 7 /PB1) (clearance 0.09906))
+ (net 6 /PB1) (clearance 0.09906))
(pad 18 smd rect (at 1.74752 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
- (net 6 /PB0) (clearance 0.09906))
+ (net 5 /PB0) (clearance 0.09906))
(pad 17 smd rect (at 2.2479 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
- (net 1 +3.3V) (clearance 0.09906))
+ (net 20 +3V3) (clearance 0.09906))
(pad 16 smd rect (at 2.74574 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
- (net 16 /SDA) (clearance 0.09906))
+ (net 15 /SDA) (clearance 0.09906))
(pad 15 smd rect (at 3.24612 -3.84556 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
- (net 15 /SCL) (clearance 0.09906))
+ (net 14 /SCL) (clearance 0.09906))
(pad 29 smd rect (at -3.85318 -3.24612 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
(clearance 0.09906))
(pad 30 smd rect (at -3.85318 -2.74574 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
(pad 31 smd rect (at -3.85318 -2.24536 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
(clearance 0.09906))
(pad 32 smd rect (at -3.85318 -1.74498 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
- (net 1 +3.3V) (clearance 0.09906))
+ (net 20 +3V3) (clearance 0.09906))
(pad 33 smd rect (at -3.85318 -1.2446 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
- (net 5 /PA0) (clearance 0.09906))
+ (net 4 /PA0) (clearance 0.09906))
(pad 34 smd rect (at -3.85318 -0.74422 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
(clearance 0.09906))
(pad 35 smd rect (at -3.85318 -0.24384 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
(pad 40 smd rect (at -3.85318 2.25552 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
(clearance 0.09906))
(pad 41 smd rect (at -3.85318 2.7559 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
- (net 20 GND) (clearance 0.09906))
+ (net 19 GND) (clearance 0.09906))
(pad 42 smd rect (at -3.85318 3.25374 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
- (net 14 /RESET#) (clearance 0.09906))
+ (net 13 /RESET#) (clearance 0.09906))
(pad 43 smd rect (at -3.25374 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
- (net 1 +3.3V) (clearance 0.09906))
+ (net 20 +3V3) (clearance 0.09906))
(pad 44 smd rect (at -2.80162 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
- (net 17 /WAKEUP) (clearance 0.09906))
+ (net 16 /WAKEUP) (clearance 0.09906))
(pad 45 smd rect (at -2.30378 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
(clearance 0.09906))
(pad 46 smd rect (at -1.8034 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
(pad 52 smd rect (at 1.19634 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
(clearance 0.09906))
(pad 53 smd rect (at 1.69672 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
- (net 20 GND) (clearance 0.09906))
+ (net 19 GND) (clearance 0.09906))
(pad 54 smd rect (at 2.1971 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
(clearance 0.09906))
(pad 55 smd rect (at 2.69748 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
- (net 1 +3.3V) (clearance 0.09906))
+ (net 20 +3V3) (clearance 0.09906))
(pad 56 smd rect (at 3.19786 3.85572 270) (size 0.2794 0.69088) (layers Back B.Paste B.Mask)
- (net 20 GND) (clearance 0.09906))
+ (net 19 GND) (clearance 0.09906))
(pad 1 smd rect (at 3.7973 3.25628 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
(clearance 0.09906))
(pad 2 smd rect (at 3.7973 2.7559 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
(clearance 0.09906))
(pad 3 smd rect (at 3.7973 2.25552 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
- (net 1 +3.3V) (clearance 0.09906))
+ (net 20 +3V3) (clearance 0.09906))
(pad 4 smd rect (at 3.7973 1.75514 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
- (net 19 /XTALOUT) (clearance 0.09906))
+ (net 18 /XTALOUT) (clearance 0.09906))
(pad 5 smd rect (at 3.7973 1.25476 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
- (net 18 /XTALIN) (clearance 0.09906))
+ (net 17 /XTALIN) (clearance 0.09906))
(pad 6 smd rect (at 3.7973 0.75438 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
- (net 20 GND) (clearance 0.09906))
+ (net 19 GND) (clearance 0.09906))
(pad 7 smd rect (at 3.7973 0.254 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
- (net 1 +3.3V) (clearance 0.09906))
+ (net 20 +3V3) (clearance 0.09906))
(pad 8 smd rect (at 3.7973 -0.24384 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
- (net 4 /DP) (clearance 0.09906))
+ (net 3 /DP) (clearance 0.09906))
(pad 9 smd rect (at 3.7973 -0.74422 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
- (net 3 /DM) (clearance 0.09906))
+ (net 2 /DM) (clearance 0.09906))
(pad 10 smd rect (at 3.7973 -1.2446 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
- (net 20 GND) (clearance 0.09906))
+ (net 19 GND) (clearance 0.09906))
(pad 11 smd rect (at 3.7973 -1.74498 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
- (net 1 +3.3V) (clearance 0.09906))
+ (net 20 +3V3) (clearance 0.09906))
(pad 12 smd rect (at 3.7973 -2.24536 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
- (net 20 GND) (clearance 0.09906))
+ (net 19 GND) (clearance 0.09906))
(pad 13 smd rect (at 3.7973 -2.74574 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
(clearance 0.09906))
(pad 14 smd rect (at 3.7973 -3.24612 270) (size 0.69088 0.2794) (layers Back B.Paste B.Mask)
- (net 20 GND) (clearance 0.09906))
+ (net 19 GND) (clearance 0.09906))
)
(module MICRO-USB-B-SMD (layer Front) (tedit 4FCE8BF5) (tstamp 4FCBF583)
(effects (font (thickness 0.3048)))
)
(pad 1 smd rect (at -1.30048 -0.94996 270) (size 0.39878 1.34874) (layers Front F.Paste F.Mask)
- (net 2 +5V) (clearance 0.09906))
+ (net 1 +5V) (clearance 0.09906))
(pad 2 smd rect (at -0.65024 -0.94996 270) (size 0.39878 1.34874) (layers Front F.Paste F.Mask)
- (net 3 /DM) (clearance 0.09906))
+ (net 2 /DM) (clearance 0.09906))
(pad 3 smd rect (at 0 -0.94996 270) (size 0.39878 1.34874) (layers Front F.Paste F.Mask)
- (net 4 /DP) (clearance 0.09906))
+ (net 3 /DP) (clearance 0.09906))
(pad 4 smd rect (at 0.65024 -0.94996 270) (size 0.39878 1.34874) (layers Front F.Paste F.Mask)
(clearance 0.09906))
(pad 5 smd rect (at 1.30048 -0.94996 270) (size 0.39878 1.34874) (layers Front F.Paste F.Mask)
- (net 20 GND) (clearance 0.09906))
+ (net 19 GND) (clearance 0.09906))
(pad 6 smd rect (at -3.0988 -0.8509 270) (size 2.10058 1.6002) (layers Front F.Paste F.Mask)
- (net 20 GND) (clearance 0.29972))
+ (net 19 GND) (clearance 0.29972))
(pad 7 smd rect (at 3.10134 -0.8509 270) (size 2.10058 1.6002) (layers Front F.Paste F.Mask)
- (net 20 GND) (clearance 0.29972))
+ (net 19 GND) (clearance 0.29972))
(pad 9 smd rect (at 3.8989 1.69926 270) (size 1.89992 1.89992) (layers Front F.Paste F.Mask)
- (net 20 GND) (clearance 0.29972))
+ (net 19 GND) (clearance 0.29972))
(pad "" smd rect (at 1.19888 1.69926 270) (size 1.89992 1.89992) (layers Front F.Paste F.Mask)
(clearance 0.29972))
(pad "" smd rect (at -1.19888 1.69926 270) (size 1.89992 1.89992) (layers Front F.Paste F.Mask)
(clearance 0.29972))
(pad 8 smd rect (at -3.8989 1.69926 270) (size 1.89992 1.89992) (layers Front F.Paste F.Mask)
- (net 20 GND) (clearance 0.29972))
- )
-
- (module ABM11 (layer Back) (tedit 4FCC041D) (tstamp 4FCBF584)
- (at 69.0245 49.62398 180)
- (path /4FCBF38C)
- (fp_text reference X1 (at 19.9009 0.20066 180) (layer B.SilkS)
- (effects (font (thickness 0.3048)) (justify mirror))
- )
- (fp_text value QUARTZCMS4 (at -7.19836 21.30044 180) (layer B.SilkS)
- (effects (font (thickness 0.3048)) (justify mirror))
- )
- (pad 1 smd rect (at -0.65024 -0.50038 180) (size 0.7493 0.65024) (layers Back B.Paste B.Mask)
- (net 18 /XTALIN) (clearance 0.09906))
- (pad 2 smd rect (at 0.6477 -0.50038 180) (size 0.7493 0.65024) (layers Back B.Paste B.Mask)
- (clearance 0.09906))
- (pad 3 smd rect (at 0.6477 0.50038 180) (size 0.7493 0.65024) (layers Back B.Paste B.Mask)
- (net 19 /XTALOUT) (clearance 0.09906))
- (pad 4 smd rect (at -0.65024 0.50038 180) (size 0.7493 0.65024) (layers Back B.Paste B.Mask)
- (clearance 0.09906))
+ (net 19 GND) (clearance 0.29972))
)
(module SM0402 (layer Back) (tedit 4FCE9096) (tstamp 4FCBF580)
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0 270) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 1 +3.3V))
+ (net 20 +3V3))
(pad 2 smd rect (at 0.44958 0 270) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 20 GND))
+ (net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.254 0.381) (layer F.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0 180) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
- (net 22 N-000044))
+ (net 22 "Net-(D1-Pad1)"))
(pad 2 smd rect (at 0.44958 0 180) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
- (net 20 GND))
+ (net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.254 0.381) (layer F.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0 270) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
- (net 2 +5V))
+ (net 1 +5V))
(pad 2 smd rect (at 0.44958 0 270) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
- (net 20 GND))
+ (net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.254 0.381) (layer F.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0 180) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
- (net 21 N-000005))
+ (net 21 "Net-(C15-Pad1)"))
(pad 2 smd rect (at 0.44958 0 180) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
- (net 20 GND))
+ (net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 1 +3.3V))
+ (net 20 +3V3))
(pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 20 GND))
+ (net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 1 +3.3V))
+ (net 20 +3V3))
(pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 14 /RESET#))
+ (net 13 /RESET#))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0 270) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 1 +3.3V))
+ (net 20 +3V3))
(pad 2 smd rect (at 0.44958 0 270) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 20 GND))
+ (net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0 270) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 1 +3.3V))
+ (net 20 +3V3))
(pad 2 smd rect (at 0.44958 0 270) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 20 GND))
+ (net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0 90) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 1 +3.3V))
+ (net 20 +3V3))
(pad 2 smd rect (at 0.44958 0 90) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 20 GND))
+ (net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 1 +3.3V))
+ (net 20 +3V3))
(pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 20 GND))
+ (net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0 90) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 1 +3.3V))
+ (net 20 +3V3))
(pad 2 smd rect (at 0.44958 0 90) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 20 GND))
+ (net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0 90) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 1 +3.3V))
+ (net 20 +3V3))
(pad 2 smd rect (at 0.44958 0 90) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 20 GND))
+ (net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0 270) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 1 +3.3V))
+ (net 20 +3V3))
(pad 2 smd rect (at 0.44958 0 270) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 20 GND))
+ (net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 18 /XTALIN))
+ (net 17 /XTALIN))
(pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 20 GND))
+ (net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0 90) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 19 /XTALOUT))
+ (net 18 /XTALOUT))
(pad 2 smd rect (at 0.44958 0 90) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 20 GND))
+ (net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.254 0.381) (layer F.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
- (net 1 +3.3V))
+ (net 20 +3V3))
(pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
- (net 20 GND))
+ (net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0 270) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 1 +3.3V))
+ (net 20 +3V3))
(pad 2 smd rect (at 0.44958 0 270) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 17 /WAKEUP))
+ (net 16 /WAKEUP))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(module SM0402 (layer Front) (tedit 4FCE90B3) (tstamp 4FCBF552)
(at 72.45096 39.34968)
- (path /4FCAAEBE)
+ (path /4FCA93BD)
(attr smd)
(fp_text reference R4 (at 0 0.0508) (layer F.SilkS)
(effects (font (size 0.3048 0.3048) (thickness 0.0762)))
(fp_line (start 0.762 -0.381) (end 0.762 0.381) (layer F.SilkS) (width 0.127))
(fp_line (start 0.762 0.381) (end 0.254 0.381) (layer F.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
- (net 22 N-000044))
+ (net 15 /SDA))
(pad 2 smd rect (at 0.44958 0) (size 0.39878 0.59944) (layers Front F.Paste F.Mask)
- (net 5 /PA0))
+ (net 20 +3V3))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0 180) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 1 +3.3V))
+ (net 20 +3V3))
(pad 2 smd rect (at 0.44958 0 180) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 20 GND))
+ (net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0 180) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 1 +3.3V))
+ (net 20 +3V3))
(pad 2 smd rect (at 0.44958 0 180) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 20 GND))
+ (net 19 GND))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(module SM0402 (layer Back) (tedit 4FCE90A9) (tstamp 4FCBF56C)
(at 79.49946 48.90008 270)
- (path /4FCA93BD)
+ (path /5151D52F)
(attr smd)
(fp_text reference R3 (at 0 0.00254 270) (layer B.SilkS)
(effects (font (size 0.3048 0.3048) (thickness 0.0762)) (justify mirror))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0 270) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 16 /SDA))
+ (net 14 /SCL))
(pad 2 smd rect (at 0.44958 0 270) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 1 +3.3V))
+ (net 20 +3V3))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
(module CONN-5x1-SMD-127MM (layer Back) (tedit 515DA9CB) (tstamp 5151CF2A)
(at 79.2988 43.35018 270)
- (path /5150B98F)
+ (path /59637927)
(fp_text reference P2 (at 20.78482 4.1148 270) (layer B.SilkS)
(effects (font (thickness 0.3048)) (justify mirror))
)
- (fp_text value CONN_5 (at 20.91182 7.2898 270) (layer B.SilkS)
+ (fp_text value CONN_01X05 (at 20.91182 7.2898 270) (layer B.SilkS)
(effects (font (thickness 0.3048)) (justify mirror))
)
(pad 1 smd rect (at -2.17932 -0.16002 270) (size 0.75946 2.4003) (layers Back B.Paste B.Mask)
- (net 20 GND) (clearance 0.0508))
+ (net 19 GND) (clearance 0.0508))
(pad 2 smd rect (at -0.90424 -0.16002 270) (size 0.75946 2.4003) (layers Back B.Paste B.Mask)
- (net 13 /PB7) (clearance 0.0508))
+ (net 12 /PB7) (clearance 0.0508))
(pad 3 smd rect (at 0.37084 -0.16002 270) (size 0.75946 2.4003) (layers Back B.Paste B.Mask)
- (net 11 /PB5) (clearance 0.0508))
+ (net 10 /PB5) (clearance 0.0508))
(pad 4 smd rect (at 1.64592 -0.16002 270) (size 0.75946 2.4003) (layers Back B.Paste B.Mask)
- (net 9 /PB3) (clearance 0.0508))
+ (net 8 /PB3) (clearance 0.0508))
(pad 5 smd rect (at 2.921 -0.16002 270) (size 0.75946 2.4003) (layers Back B.Paste B.Mask)
- (net 7 /PB1) (clearance 0.0508))
+ (net 6 /PB1) (clearance 0.0508))
)
(module CONN-5x1-SMD-127MM (layer Front) (tedit 515DA9C8) (tstamp 4FCD3C8E)
(at 79.2988 44.09948 90)
- (path /5150B984)
+ (path /596377A2)
(fp_text reference P1 (at -19.52752 7.9502 90) (layer F.SilkS)
(effects (font (thickness 0.3048)))
)
- (fp_text value CONN_5 (at -19.40052 5.1562 90) (layer F.SilkS)
+ (fp_text value CONN_01X05 (at -19.40052 5.1562 90) (layer F.SilkS)
(effects (font (thickness 0.3048)))
)
(pad 1 smd rect (at -2.17932 0.16002 90) (size 0.75946 2.4003) (layers Front F.Paste F.Mask)
- (net 6 /PB0) (clearance 0.0508))
+ (net 5 /PB0) (clearance 0.0508))
(pad 2 smd rect (at -0.90424 0.16002 90) (size 0.75946 2.4003) (layers Front F.Paste F.Mask)
- (net 8 /PB2) (clearance 0.0508))
+ (net 7 /PB2) (clearance 0.0508))
(pad 3 smd rect (at 0.37084 0.16002 90) (size 0.75946 2.4003) (layers Front F.Paste F.Mask)
- (net 10 /PB4) (clearance 0.0508))
+ (net 9 /PB4) (clearance 0.0508))
(pad 4 smd rect (at 1.64592 0.16002 90) (size 0.75946 2.4003) (layers Front F.Paste F.Mask)
- (net 12 /PB6) (clearance 0.0508))
+ (net 11 /PB6) (clearance 0.0508))
(pad 5 smd rect (at 2.921 0.16002 90) (size 0.75946 2.4003) (layers Front F.Paste F.Mask)
- (net 20 GND) (clearance 0.0508))
+ (net 19 GND) (clearance 0.0508))
)
(module SM0402 (layer Back) (tedit 5151D5A0) (tstamp 5151D57D)
(at 77.0509 49.2506 270)
- (path /5151D52F)
+ (path /4FCAAEBE)
(attr smd)
(fp_text reference R5 (at 0 0 270) (layer B.SilkS)
(effects (font (size 0.3048 0.3048) (thickness 0.0762)) (justify mirror))
(fp_line (start 0.762 0.381) (end 0.762 -0.381) (layer B.SilkS) (width 0.127))
(fp_line (start 0.762 -0.381) (end 0.254 -0.381) (layer B.SilkS) (width 0.127))
(pad 1 smd rect (at -0.44958 0 270) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 15 /SCL))
+ (net 22 "Net-(D1-Pad1)"))
(pad 2 smd rect (at 0.44958 0 270) (size 0.39878 0.59944) (layers Back B.Paste B.Mask)
- (net 1 +3.3V))
+ (net 4 /PA0))
(model smd\chip_cms.wrl
(at (xyz 0 0 0.002))
(scale (xyz 0.05 0.05 0.05))
)
)
+ (module ABM11 (layer Front) (tedit 4FCBBD24) (tstamp 596295DB)
+ (at 74.20102 60.761901)
+ (path /5963E355)
+ (fp_text reference Y1 (at 0 6.72592) (layer F.SilkS)
+ (effects (font (thickness 0.3048)))
+ )
+ (fp_text value Crystal (at 0 -4.7498) (layer F.SilkS)
+ (effects (font (thickness 0.3048)))
+ )
+ (pad 1 smd rect (at -0.65024 0.50038) (size 0.7493 0.65024) (layers Front F.Paste F.Mask)
+ (net 17 /XTALIN) (clearance 0.09906))
+ (pad 2 smd rect (at 0.6477 0.50038) (size 0.7493 0.65024) (layers Front F.Paste F.Mask)
+ (net 18 /XTALOUT) (clearance 0.09906))
+ (pad 3 smd rect (at 0.6477 -0.50038) (size 0.7493 0.65024) (layers Front F.Paste F.Mask)
+ (clearance 0.09906))
+ (pad 4 smd rect (at -0.65024 -0.50038) (size 0.7493 0.65024) (layers Front F.Paste F.Mask)
+ (clearance 0.09906))
+ )
+
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(gr_line (start 80.70088 38.75024) (end 80.70088 37.74948) (angle 90) (layer Edge.Cuts) (width 0.0254))
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projects / fx2grok.git / commitdiff