srd: I2C: change format to have ACK/NACK bits as separate events

diff --git a/decoders/ebr30a_i2c_demux/ebr30a_i2c_demux.py b/decoders/ebr30a_i2c_demux/ebr30a_i2c_demux.py
index 50a1dbe938a36f16bb187820f882e53720cc63d3..4c4a8e42cfbc671fb83c924d2f3a4158ae428951 100644 (file)
--- a/decoders/ebr30a_i2c_demux/ebr30a_i2c_demux.py
+++ b/decoders/ebr30a_i2c_demux/ebr30a_i2c_demux.py
@@ -64,7 +64,7 @@ class Decoder(srd.Decoder):
     # get the whole chunk of packets (from START to STOP).
     def decode(self, ss, es, data):
 
-        cmd, databyte, ack_bit = data
+        cmd, databyte = data
 
         # Add the I2C packet to our local cache.
         self.packets.append([ss, es, data])

diff --git a/decoders/i2c/i2c.py b/decoders/i2c/i2c.py
index 7dce8e12dab31a980a7339608f43a9f7153f73a3..5f952fae797f8539b53bf3272259a290a7344eee 100644 (file)
--- a/decoders/i2c/i2c.py
+++ b/decoders/i2c/i2c.py
@@ -54,6 +54,7 @@ protocol = {
 FIND_START = 0
 FIND_ADDRESS = 1
 FIND_DATA = 2
+FIND_ACK = 3
 
 class Decoder(srd.Decoder):
     api_version = 1
@@ -61,7 +62,6 @@ class Decoder(srd.Decoder):
     name = 'I2C'
     longname = 'Inter-Integrated Circuit'
     desc = 'I2C is a two-wire, multi-master, serial bus.'
-    longdesc = '...'
     license = 'gplv2+'
     inputs = ['logic']
     outputs = ['i2c']
@@ -124,7 +124,7 @@ class Decoder(srd.Decoder):
         self.startsample = self.samplenum
 
         cmd = 'START REPEAT' if (self.is_repeat_start == 1) else 'START'
-        self.put(self.out_proto, [cmd, None, None])
+        self.put(self.out_proto, [cmd, None])
         self.put(self.out_ann, [ANN_SHIFTED, [protocol[cmd][0]]])
         self.put(self.out_ann, [ANN_SHIFTED_SHORT, [protocol[cmd][1]]])
 
@@ -144,28 +144,22 @@ class Decoder(srd.Decoder):
 
         # Return if we haven't collected all 8 + 1 bits, yet.
         self.bitcount += 1
-        if self.bitcount != 9:
+        if self.bitcount != 8:
             return
 
+        # We triggered on the ACK/NACK bit, but won't report that until later.
+        self.startsample -= 1
+
         # Send raw output annotation before we start shifting out
-        # read/write and ack/nack bits.
+        # read/write and ACK/NACK bits.
         self.put(self.out_ann, [ANN_RAW, ['0x%.2x' % self.databyte]])
 
-        # We received 8 address/data bits and the ACK/NACK bit.
-        self.databyte >>= 1 # Shift out unwanted ACK/NACK bit here.
-
         if self.state == FIND_ADDRESS:
             # The READ/WRITE bit is only in address bytes, not data bytes.
             self.wr = 0 if (self.databyte & 1) else 1
             d = self.databyte >> 1
         elif self.state == FIND_DATA:
             d = self.databyte
-        else:
-            # TODO: Error?
-            pass
-
-        # Last bit that came in was the ACK/NACK bit (1 = NACK).
-        ack_bit = 'NACK' if (sda == 1) else 'ACK'
 
         if self.state == FIND_ADDRESS and self.wr == 1:
             cmd = 'ADDRESS WRITE'
@@ -176,26 +170,28 @@ class Decoder(srd.Decoder):
         elif self.state == FIND_DATA and self.wr == 0:
             cmd = 'DATA READ'
 
-        self.put(self.out_proto, [cmd, d, ack_bit])
-        self.put(self.out_ann, [ANN_SHIFTED,
-                 [protocol[cmd][0], '0x%02x' % d, protocol[ack_bit][0]]])
-        self.put(self.out_ann, [ANN_SHIFTED_SHORT,
-                 [protocol[cmd][1], '0x%02x' % d, protocol[ack_bit][1]]])
+        self.put(self.out_proto, [cmd, d])
+        self.put(self.out_ann, [ANN_SHIFTED, [protocol[cmd][0], '0x%02x' % d]])
+        self.put(self.out_ann, [ANN_SHIFTED_SHORT, [protocol[cmd][1], '0x%02x' % d]])
 
-        self.bitcount = self.databyte = 0
+        # Done with this packet.
         self.startsample = -1
+        self.bitcount = self.databyte = 0
+        self.state = FIND_ACK
 
-        if self.state == FIND_ADDRESS:
-            self.state = FIND_DATA
-        elif self.state == FIND_DATA:
-            # There could be multiple data bytes in a row.
-            # So, either find a STOP condition or another data byte next.
-            pass
+    def get_ack(self, scl, sda):
+        self.startsample = self.samplenum
+        ack_bit = 'NACK' if (sda == 1) else 'ACK'
+        self.put(self.out_proto, [ack_bit, None])
+        self.put(self.out_ann, [ANN_SHIFTED, [protocol[ack_bit][0]]])
+        self.put(self.out_ann, [ANN_SHIFTED_SHORT, [protocol[ack_bit][1]]])
+        # There could be multiple data bytes in a row, so either find
+        # another data byte or a STOP condition next.
+        self.state = FIND_DATA
 
     def found_stop(self, scl, sda):
         self.startsample = self.samplenum
-
-        self.put(self.out_proto, ['STOP', None, None])
+        self.put(self.out_proto, ['STOP', None])
         self.put(self.out_ann, [ANN_SHIFTED, [protocol['STOP'][0]]])
         self.put(self.out_ann, [ANN_SHIFTED_SHORT, [protocol['STOP'][1]]])
 
@@ -233,6 +229,9 @@ class Decoder(srd.Decoder):
                     self.found_start(scl, sda)
                 elif self.is_stop_condition(scl, sda):
                     self.found_stop(scl, sda)
+            elif self.state == FIND_ACK:
+                if self.is_data_bit(scl, sda):
+                    self.get_ack(scl, sda)
             else:
                 raise Exception('Invalid state %d' % self.STATE)
 

diff --git a/decoders/i2cdemux/i2cdemux.py b/decoders/i2cdemux/i2cdemux.py
index c4c0d3b09fe68150415aa744eda3f24adf640fc7..4632c8df17644e73936f2a3b7c478e8152bf7f9e 100644 (file)
--- a/decoders/i2cdemux/i2cdemux.py
+++ b/decoders/i2cdemux/i2cdemux.py
@@ -57,7 +57,7 @@ class Decoder(srd.Decoder):
     # get the whole chunk of packets (from START to STOP).
     def decode(self, ss, es, data):
 
-        cmd, databyte, ack = data
+        cmd, databyte = data
 
         # Add the I2C packet to our local cache.
         self.packets.append([ss, es, data])

diff --git a/decoders/i2cfilter/i2cfilter.py b/decoders/i2cfilter/i2cfilter.py
index 6c1f4c862e300d80dcfe457aa4ecdad00fa06ffd..939e667b77b94195083c99bd063f7d44a54871d7 100644 (file)
--- a/decoders/i2cfilter/i2cfilter.py
+++ b/decoders/i2cfilter/i2cfilter.py
@@ -45,7 +45,7 @@ class Decoder(srd.Decoder):
 
     def decode(self, ss, es, data):
         try:
-            cmd, data, ack_bit = data
+            cmd, data = data
         except Exception as e:
             raise Exception('Malformed I2C input: %s' % str(e)) from e
 
@@ -57,6 +57,9 @@ class Decoder(srd.Decoder):
         if cmd == 'STOP':
             self.state = None
             return
+        if cmd in ('ACK', 'NACK'):
+            # Don't care, we just want data.
+            return
 
         if self.state == 'start':
             # Start of a transfer, see if we want this one.

diff --git a/decoders/mlx90614/mlx90614.py b/decoders/mlx90614/mlx90614.py
index 4fa8a0d94846f134c01910842b2340d159f91d06..329aae21b835688e1820f1469cb6f99b783e6eeb 100644 (file)
--- a/decoders/mlx90614/mlx90614.py
+++ b/decoders/mlx90614/mlx90614.py
@@ -56,7 +56,7 @@ class Decoder(srd.Decoder):
 
     # Quick hack implementation! This needs to be improved a lot!
     def decode(self, ss, es, data):
-        cmd, databyte, ack = data
+        cmd, databyte = data
 
         # State machine.
         if self.state == 'IGNORE START REPEAT':

diff --git a/decoders/nunchuk/nunchuk.py b/decoders/nunchuk/nunchuk.py
index cd6fa213cdaec5297dd9cf22c2ea86bfa96643e2..0e5e7420843745311e7c86a482e6188b42845cab 100644 (file)
--- a/decoders/nunchuk/nunchuk.py
+++ b/decoders/nunchuk/nunchuk.py
@@ -60,7 +60,7 @@ class Decoder(srd.Decoder):
 
     def decode(self, ss, es, data):
 
-        cmd, databyte, ack_bit = data
+        cmd, databyte = data
 
         if cmd == 'START': # TODO: Handle 'Sr' here, too?
             self.state = START

diff --git a/decoders/rtc8564/rtc8564.py b/decoders/rtc8564/rtc8564.py
index 4ce6070ac6f2ff7971f2daa895e3769c2e834008..d2838e3d5c7df0abec66971cf9c7db082b84ce1c 100644 (file)
--- a/decoders/rtc8564/rtc8564.py
+++ b/decoders/rtc8564/rtc8564.py
@@ -154,7 +154,7 @@ class Decoder(srd.Decoder):
         pass
 
     def decode(self, ss, es, data):
-        cmd, databyte, ack = data
+        cmd, databyte = data
 
         # Store the start/end samples of this I2C packet.
         self.ss, self.es = ss, es