]> sigrok.org Git - libsigrok.git/commitdiff
asix-sigma: more trigger LUT download rephrase, think 16bit entities
authorGerhard Sittig <redacted>
Mon, 18 May 2020 20:09:39 +0000 (22:09 +0200)
committerGerhard Sittig <redacted>
Sun, 31 May 2020 21:44:56 +0000 (23:44 +0200)
Further rephrase the sigma_write_trigger_lut() routine. It's helpful to
"think" in BE16 quantities to improve readability of LUT address and
parameter downloads. Better matches the vendor's documentation. Also use
a better name for the "trigger select 2" register content.

src/hardware/asix-sigma/protocol.c

index edddb293b515b552ea60f7e6a74c4fd04a77c09c..023001d9d1c4de1115a9bca32f806f8bb9fe13c9 100644 (file)
@@ -435,8 +435,9 @@ SR_PRIV int sigma_write_trigger_lut(struct dev_context *devc,
        size_t lut_addr;
        uint16_t bit;
        uint8_t m3d, m2d, m1d, m0d;
-       uint8_t buf[6], *wrptr, v8;
-       uint16_t selreg;
+       uint8_t buf[6], *wrptr;
+       uint8_t trgsel2;
+       uint16_t lutreg, selreg;
        int ret;
 
        /*
@@ -497,15 +498,19 @@ SR_PRIV int sigma_write_trigger_lut(struct dev_context *devc,
                 * programming.
                 */
                wrptr = buf;
-               write_u8_inc(&wrptr, (m3d << 4) | (m2d << 0));
-               write_u8_inc(&wrptr, (m1d << 4) | (m0d << 0));
+               lutreg = 0;
+               lutreg <<= 4; lutreg |= m3d;
+               lutreg <<= 4; lutreg |= m2d;
+               lutreg <<= 4; lutreg |= m1d;
+               lutreg <<= 4; lutreg |= m0d;
+               write_u16be_inc(&wrptr, lutreg);
                ret = sigma_write_register(devc, WRITE_TRIGGER_SELECT,
                        buf, wrptr - buf);
                if (ret != SR_OK)
                        return ret;
-               v8 = TRGSEL2_RESET | TRGSEL2_LUT_WRITE |
+               trgsel2 = TRGSEL2_RESET | TRGSEL2_LUT_WRITE |
                        (lut_addr & TRGSEL2_LUT_ADDR_MASK);
-               ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, v8);
+               ret = sigma_set_register(devc, WRITE_TRIGGER_SELECT2, trgsel2);
                if (ret != SR_OK)
                        return ret;
        }