Initial commit of fx2grok-flat V0.3.

diff --git a/hardware/fx2grok-flat/0.3/fx2grok-flat-cache.lib b/hardware/fx2grok-flat/0.3/fx2grok-flat-cache.lib
new file mode 100644 (file)
index 0000000..ca88874
--- /dev/null
+++ b/hardware/fx2grok-flat/0.3/fx2grok-flat-cache.lib
@@ -0,0 +1,462 @@
+EESchema-LIBRARY Version 2.4
+#encoding utf-8
+#
+# Connector_Generic_Conn_02x07_Odd_Even
+#
+DEF Connector_Generic_Conn_02x07_Odd_Even J 0 40 Y N 1 F N
+F0 "J" 50 400 50 H V C CNN
+F1 "Connector_Generic_Conn_02x07_Odd_Even" 50 -400 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ Connector*:*_2x??_*
+$ENDFPLIST
+DRAW
+S -50 -295 0 -305 1 1 6 N
+S -50 -195 0 -205 1 1 6 N
+S -50 -95 0 -105 1 1 6 N
+S -50 5 0 -5 1 1 6 N
+S -50 105 0 95 1 1 6 N
+S -50 205 0 195 1 1 6 N
+S -50 305 0 295 1 1 6 N
+S -50 350 150 -350 1 1 10 f
+S 150 -295 100 -305 1 1 6 N
+S 150 -195 100 -205 1 1 6 N
+S 150 -95 100 -105 1 1 6 N
+S 150 5 100 -5 1 1 6 N
+S 150 105 100 95 1 1 6 N
+S 150 205 100 195 1 1 6 N
+S 150 305 100 295 1 1 6 N
+X Pin_1 1 -200 300 150 R 50 50 1 1 P
+X Pin_10 10 300 -100 150 L 50 50 1 1 P
+X Pin_11 11 -200 -200 150 R 50 50 1 1 P
+X Pin_12 12 300 -200 150 L 50 50 1 1 P
+X Pin_13 13 -200 -300 150 R 50 50 1 1 P
+X Pin_14 14 300 -300 150 L 50 50 1 1 P
+X Pin_2 2 300 300 150 L 50 50 1 1 P
+X Pin_3 3 -200 200 150 R 50 50 1 1 P
+X Pin_4 4 300 200 150 L 50 50 1 1 P
+X Pin_5 5 -200 100 150 R 50 50 1 1 P
+X Pin_6 6 300 100 150 L 50 50 1 1 P
+X Pin_7 7 -200 0 150 R 50 50 1 1 P
+X Pin_8 8 300 0 150 L 50 50 1 1 P
+X Pin_9 9 -200 -100 150 R 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# pkl_conn_pkl_USB_OTG
+#
+DEF pkl_conn_pkl_USB_OTG P 0 40 Y Y 1 F N
+F0 "P" 325 -125 50 H V C CNN
+F1 "pkl_conn_pkl_USB_OTG" 0 200 50 H V C CNN
+F2 "" -50 -100 60 V V C CNN
+F3 "" -50 -100 60 V V C CNN
+$FPLIST
+ USB*
+$ENDFPLIST
+DRAW
+S -250 -150 250 150 0 1 0 N
+S -205 -150 -195 -120 0 1 0 N
+S -105 -150 -95 -120 0 1 0 N
+S -5 -150 5 -120 0 1 0 N
+S 95 -150 105 -120 0 1 0 N
+S 195 -150 205 -120 0 1 0 N
+X VCC 1 -200 -300 150 U 50 50 1 1 w
+X D- 2 -100 -300 150 U 50 50 1 1 P
+X D+ 3 0 -300 150 U 50 50 1 1 P
+X ID 4 100 -300 150 U 50 50 1 1 W
+X GND 5 200 -300 150 U 50 50 1 1 W
+X shield GND 400 100 150 L 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# pkl_cypress_CY7C68013A-56
+#
+DEF pkl_cypress_CY7C68013A-56 IC 0 40 Y Y 1 F N
+F0 "IC" 0 -1700 60 H V C CNN
+F1 "pkl_cypress_CY7C68013A-56" 0 0 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+S -1100 1400 1000 -1300 0 1 0 N
+X RDY0/SLRD 1 -1400 1300 300 R 50 50 1 1 I
+X AGND 10 300 -1500 300 U 50 50 1 1 W
+X VCC 11 -500 1700 300 D 50 50 1 1 W
+X GND 12 -500 -1500 300 U 50 50 1 1 W
+X IFCLK 13 -1400 400 300 R 50 50 1 1 B C
+X RESERVED 14 -1400 -1000 300 R 50 50 1 1 I
+X SCL 15 -1400 100 300 R 50 50 1 1 O
+X SDA 16 -1400 0 300 R 50 50 1 1 B
+X VCC 17 -400 1700 300 D 50 50 1 1 W
+X PB0/FD0 18 1300 400 300 L 50 50 1 1 B
+X PB1/FD1 19 1300 300 300 L 50 50 1 1 B
+X RDY1/SLWR 2 -1400 1200 300 R 50 50 1 1 I
+X PB2/FD2 20 1300 200 300 L 50 50 1 1 B
+X PB3/FD3 21 1300 100 300 L 50 50 1 1 B
+X PB4/FD4 22 1300 0 300 L 50 50 1 1 B
+X PB5/FD5 23 1300 -100 300 L 50 50 1 1 B
+X PB6/FD6 24 1300 -200 300 L 50 50 1 1 B
+X PB7/FD7 25 1300 -300 300 L 50 50 1 1 B
+X GND 26 -400 -1500 300 U 50 50 1 1 W
+X VCC 27 -300 1700 300 D 50 50 1 1 W
+X GND 28 -300 -1500 300 U 50 50 1 1 W
+X CTL0/FLAGA 29 -1400 -200 300 R 50 50 1 1 O
+X AVCC 3 200 1700 300 D 50 50 1 1 W
+X CTL1/FLAGB 30 -1400 -300 300 R 50 50 1 1 O
+X CTL2/FLAGC 31 -1400 -400 300 R 50 50 1 1 O
+X VCC 32 -200 1700 300 D 50 50 1 1 W
+X PA0/~INT0 33 1300 1300 300 L 50 50 1 1 B
+X PA1/~INT1 34 1300 1200 300 L 50 50 1 1 B
+X PA2/SLOE 35 1300 1100 300 L 50 50 1 1 B
+X PA3/WU2 36 1300 1000 300 L 50 50 1 1 B
+X PA4/FIFOADR0 37 1300 900 300 L 50 50 1 1 B
+X PA5/FIFOADR1 38 1300 800 300 L 50 50 1 1 B
+X PA6/PKTEND 39 1300 700 300 L 50 50 1 1 B
+X XTALOUT 4 -1400 1000 300 R 50 50 1 1 O
+X PA7/FLAGD/~SLCS 40 1300 600 300 L 50 50 1 1 B
+X GND 41 -200 -1500 300 U 50 50 1 1 W
+X ~RESET 42 -1400 -600 300 R 50 50 1 1 I I
+X VCC 43 -100 1700 300 D 50 50 1 1 W
+X WAKEUP 44 -1400 -800 300 R 50 50 1 1 I
+X PD0/FD8 45 1300 -500 300 L 50 50 1 1 B
+X PD1/FD9 46 1300 -600 300 L 50 50 1 1 B
+X PD2/FD10 47 1300 -700 300 L 50 50 1 1 B
+X PD3/FD11 48 1300 -800 300 L 50 50 1 1 B
+X PD4/FD12 49 1300 -900 300 L 50 50 1 1 B
+X XTALIN 5 -1400 900 300 R 50 50 1 1 I
+X PD5/FD13 50 1300 -1000 300 L 50 50 1 1 B
+X PD6/FD14 51 1300 -1100 300 L 50 50 1 1 B
+X PD7/FD15 52 1300 -1200 300 L 50 50 1 1 B
+X GND 53 -100 -1500 300 U 50 50 1 1 W
+X CLKOUT 54 -1400 300 300 R 50 50 1 1 O C
+X VCC 55 0 1700 300 D 50 50 1 1 W
+X GND 56 0 -1500 300 U 50 50 1 1 W
+X PAD 57 500 -1500 200 U 50 50 1 1 P
+X AGND 6 200 -1500 300 U 50 50 1 1 W
+X AVCC 7 300 1700 300 D 50 50 1 1 W
+X DPLUS 8 -1400 700 300 R 50 50 1 1 B
+X DMINUS 9 -1400 600 300 R 50 50 1 1 B
+ENDDRAW
+ENDDEF
+#
+# pkl_device_pkl_C
+#
+DEF pkl_device_pkl_C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "pkl_device_pkl_C" 25 -100 50 H V L CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ C?
+ C_????_*
+ C_????
+ SMD*_c
+ Capacitor*
+$ENDFPLIST
+DRAW
+P 2 0 1 20 -80 -30 80 -30 N
+P 2 0 1 20 -80 30 80 30 N
+X ~ 1 0 100 60 D 40 40 1 1 P
+X ~ 2 0 -100 60 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# pkl_device_pkl_C_Small
+#
+DEF pkl_device_pkl_C_Small C 0 10 N N 1 F N
+F0 "C" 10 70 50 H V L CNN
+F1 "pkl_device_pkl_C_Small" 10 -80 50 H V L CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ C?
+ C_????_*
+ C_????
+ SMD*_c
+ Capacitor*
+$ENDFPLIST
+DRAW
+P 2 0 1 13 -60 -20 60 -20 N
+P 2 0 1 12 -60 20 60 20 N
+X ~ 1 0 100 75 D 40 40 1 1 P
+X ~ 2 0 -100 80 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# pkl_device_pkl_LED
+#
+DEF pkl_device_pkl_LED D 0 40 Y N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "pkl_device_pkl_LED" 0 -100 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ LED-3MM
+ LED-5MM
+ LED-10MM
+ LED-0603
+ LED-0805
+ LED-1206
+ LEDV
+$ENDFPLIST
+DRAW
+P 2 0 1 0 50 50 50 -50 N
+P 3 0 1 0 -50 50 50 0 -50 -50 F
+P 3 0 1 0 65 -40 110 -80 105 -55 N
+P 3 0 1 0 80 -25 125 -65 120 -40 N
+X A A -200 0 150 R 40 40 1 1 P
+X C C 200 0 150 L 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# pkl_device_pkl_R4_Small
+#
+DEF pkl_device_pkl_R4_Small R 0 10 N N 4 F N
+F0 "R" 30 20 50 H V L CNN
+F1 "pkl_device_pkl_R4_Small" 30 -40 50 H V L CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ Resistor_*
+ R_*
+$ENDFPLIST
+DRAW
+S -30 70 30 -70 0 1 8 N
+X ~ 1 0 100 30 D 40 40 1 1 P
+X ~ 2 0 -100 30 U 40 40 1 1 P
+X ~ 3 0 100 30 D 40 40 2 1 P
+X ~ 4 0 -100 30 U 40 40 2 1 P
+X ~ 5 0 100 30 D 40 40 3 1 P
+X ~ 6 0 -100 30 U 40 40 3 1 P
+X ~ 7 0 100 30 D 40 40 4 1 P
+X ~ 8 0 -100 30 U 40 40 4 1 P
+ENDDRAW
+ENDDEF
+#
+# pkl_device_pkl_R_Small
+#
+DEF pkl_device_pkl_R_Small R 0 10 N N 1 F N
+F0 "R" 30 20 50 H V L CNN
+F1 "pkl_device_pkl_R_Small" 30 -40 50 H V L CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ Resistor_*
+ R_*
+$ENDFPLIST
+DRAW
+S -30 70 30 -70 0 1 8 N
+X ~ 1 0 100 30 D 40 40 1 1 P
+X ~ 2 0 -100 30 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# pkl_device_pkl_VREG_5PIN_FIXED
+#
+DEF pkl_device_pkl_VREG_5PIN_FIXED U 0 40 Y Y 1 F N
+F0 "U" -150 -200 60 H V C CNN
+F1 "pkl_device_pkl_VREG_5PIN_FIXED" 0 200 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+S -200 150 200 -150 0 1 0 N
+X IN 1 -300 100 100 R 50 50 1 1 W
+X GND 2 300 -100 100 L 50 50 1 1 W
+X EN 3 -300 -100 100 R 50 50 1 1 I
+X BYP 4 -300 0 100 R 50 50 1 1 w
+X OUT 5 300 100 100 L 50 50 1 1 w
+ENDDRAW
+ENDDEF
+#
+# pkl_device_pkl_XTAL_XGXG
+#
+DEF pkl_device_pkl_XTAL_XGXG X 0 40 Y N 1 F N
+F0 "X" 100 100 50 H V C CNN
+F1 "pkl_device_pkl_XTAL_XGXG" 50 -100 50 H V L CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 2 0 1 0 -45 -70 45 -70 N
+P 2 0 1 16 -45 50 -45 -50 N
+P 2 0 1 0 -45 70 45 70 N
+P 2 0 1 16 45 50 45 -50 N
+P 5 0 1 12 -20 40 20 40 20 -40 -20 -40 -20 40 N
+X 1 1 -100 0 55 R 25 20 1 1 P
+X 2 2 100 0 55 L 25 20 1 1 P
+X case GND 0 -100 30 U 10 20 1 1 P
+X case GND 0 100 30 D 10 20 1 1 P
+ENDDRAW
+ENDDEF
+#
+# pkl_memory_pkl_24LC00
+#
+DEF pkl_memory_pkl_24LC00 U 0 30 Y Y 1 F N
+F0 "U" -250 250 50 H V C CNN
+F1 "pkl_memory_pkl_24LC00" 250 250 50 H V C CNN
+F2 "pkl_housings_sot:SOT-23-5" 500 250 50 H I L CNN
+F3 "" 0 -100 50 H V C CNN
+F4 "ANY" 0 0 60 H I C CNN "Source"
+$FPLIST
+ SOT-23*
+$ENDFPLIST
+DRAW
+S -300 200 300 -200 1 1 10 f
+X GND 2 0 -300 100 U 50 50 0 0 W
+X VCC 5 0 300 100 D 50 50 0 0 W
+X SCL 1 -400 100 100 R 50 50 1 1 I
+X SDA 3 -400 -100 100 R 50 50 1 1 B
+X NC 4 400 0 100 L 50 50 1 1 N
+ENDDRAW
+ENDDEF
+#
+# pkl_misc_IP425x-4-TTL
+#
+DEF pkl_misc_IP425x-4-TTL U 0 40 Y Y 4 F N
+F0 "U" 300 -100 60 H V C CNN
+F1 "pkl_misc_IP425x-4-TTL" 0 100 60 H V C CNN
+F2 "" 0 0 60 H I C CNN
+F3 "" 0 0 60 H I C CNN
+DRAW
+C -150 0 10 0 0 0 N
+C -80 -90 10 0 0 0 N
+C -80 0 10 0 0 0 N
+C 0 -90 10 0 0 0 N
+C 80 -90 10 0 0 0 N
+C 80 0 10 0 0 0 N
+C 150 0 10 0 0 0 N
+S -200 50 200 -150 0 0 0 N
+S -50 10 50 -10 0 0 0 N
+P 2 0 0 0 -200 0 -50 0 N
+P 2 0 0 0 -150 0 -150 -30 N
+P 2 0 0 0 -110 -60 -50 -60 N
+P 2 0 0 0 -110 -40 -50 -40 N
+P 2 0 0 0 -80 0 -80 -40 N
+P 2 0 0 0 0 -90 0 -150 N
+P 2 0 0 0 50 -60 110 -60 N
+P 2 0 0 0 50 -40 110 -40 N
+P 2 0 0 0 50 0 200 0 N
+P 2 0 0 0 80 0 80 -40 N
+P 2 0 0 0 150 0 150 -30 N
+P 3 0 0 0 -170 -30 -130 -30 -130 -40 N
+P 3 0 0 0 -150 -70 -150 -90 -80 -90 N
+P 3 0 0 0 80 -90 150 -90 150 -70 N
+P 3 0 0 0 130 -30 170 -30 170 -40 N
+P 4 0 0 0 -170 -70 -150 -30 -130 -70 -170 -70 N
+P 4 0 0 0 -80 -60 -80 -90 80 -90 80 -60 N
+P 4 0 0 0 130 -70 150 -30 170 -70 130 -70 N
+X ~ 9 0 -200 50 U 50 50 0 1 P
+X ~ 1 -300 0 100 R 50 50 1 1 P
+X ~ 8 300 0 100 L 50 50 1 1 P
+X ~ 2 -300 0 100 R 50 50 2 1 P
+X ~ 7 300 0 100 L 50 50 2 1 P
+X ~ 3 -300 0 100 R 50 50 3 1 P
+X ~ 6 300 0 100 L 50 50 3 1 P
+X ~ 4 -300 0 100 R 50 50 4 1 P
+X ~ 5 300 0 100 L 50 50 4 1 P
+ENDDRAW
+ENDDEF
+#
+# pkl_misc_USBLC6-2
+#
+DEF pkl_misc_USBLC6-2 U 0 40 Y Y 1 F N
+F0 "U" 0 -300 60 H V C CNN
+F1 "pkl_misc_USBLC6-2" 0 300 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C -140 0 5 0 1 0 N
+C 0 -100 5 0 1 0 N
+C 0 -50 5 0 1 0 N
+C 0 50 5 0 1 0 N
+C 0 100 5 0 1 0 N
+C 140 0 5 0 1 0 N
+S -300 200 300 -200 0 1 0 N
+P 2 0 1 0 -300 -100 300 -100 N
+P 2 0 1 0 -300 0 -30 0 N
+P 2 0 1 0 -300 100 300 100 N
+P 2 0 1 0 -50 -50 50 -50 N
+P 2 0 1 0 -50 -20 -50 -80 N
+P 2 0 1 0 -50 20 -50 80 N
+P 2 0 1 0 -50 50 50 50 N
+P 2 0 1 0 0 -50 0 -100 N
+P 2 0 1 0 0 50 0 100 N
+P 2 0 1 0 30 0 300 0 N
+P 2 0 1 0 110 -20 110 -80 N
+P 2 0 1 0 110 80 110 20 N
+P 3 0 1 0 -140 0 -140 -50 -110 -50 N
+P 3 0 1 0 -110 50 -140 50 -140 0 N
+P 3 0 1 0 110 -50 140 -50 140 0 N
+P 3 0 1 0 110 50 140 50 140 0 N
+P 4 0 1 0 -110 -20 -110 -80 -50 -50 -110 -20 N
+P 4 0 1 0 -110 20 -50 50 -110 80 -110 20 N
+P 4 0 1 0 -30 30 -30 -30 30 0 -30 30 N
+P 4 0 1 0 20 -30 30 -20 30 20 40 30 N
+P 4 0 1 0 50 -20 110 -50 50 -80 50 -20 N
+P 4 0 1 0 50 80 50 20 110 50 50 80 N
+X IO1 1 -500 100 200 R 50 50 1 1 B
+X GND 2 -500 0 200 R 50 50 1 1 W
+X IO2 3 -500 -100 200 R 50 50 1 1 B
+X IO2 4 500 -100 200 L 50 50 1 1 B
+X VBUS 5 500 0 200 L 50 50 1 1 W
+X IO1 6 500 100 200 L 50 50 1 1 B
+ENDDRAW
+ENDDEF
+#
+# power_+3V3
+#
+DEF power_+3V3 #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "power_+3V3" 0 140 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+ALIAS +3.3V
+DRAW
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +3V3 1 0 0 0 U 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# power_+5V
+#
+DEF power_+5V #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -150 50 H I C CNN
+F1 "power_+5V" 0 140 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 2 0 1 0 -30 50 0 100 N
+P 2 0 1 0 0 0 0 100 N
+P 2 0 1 0 0 100 30 50 N
+X +5V 1 0 0 0 U 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# power_GND
+#
+DEF power_GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "power_GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# power_PWR_FLAG
+#
+DEF power_PWR_FLAG #FLG 0 0 N N 1 F P
+F0 "#FLG" 0 75 50 H I C CNN
+F1 "power_PWR_FLAG" 0 150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 50 -40 75 0 100 40 75 0 50 N
+X pwr 1 0 0 0 U 50 50 0 0 w
+ENDDRAW
+ENDDEF
+#
+#End Library

diff --git a/hardware/fx2grok-flat/0.3/fx2grok-flat.kicad_pcb b/hardware/fx2grok-flat/0.3/fx2grok-flat.kicad_pcb
new file mode 100644 (file)
index 0000000..ab2cdec
--- /dev/null
+++ b/hardware/fx2grok-flat/0.3/fx2grok-flat.kicad_pcb
@@ -0,0 +1,3448 @@
+(kicad_pcb (version 20171130) (host pcbnew 5.0.0-rc2-dev-unknown-0d8692d~64~ubuntu16.04.1)
+
+  (general
+    (thickness 1.6)
+    (drawings 45)
+    (tracks 438)
+    (zones 0)
+    (modules 36)
+    (nets 62)
+  )
+
+  (page A4)
+  (title_block
+    (title "FX2Grok Flat")
+    (rev V0.3)
+    (company 1BitSquared)
+    (comment 1 "CC-BY-SA V4.0")
+    (comment 2 "(C) 2017 1BitSquared <info@1bitsquared.com>")
+    (comment 3 "(C) 2017 Piotr Esden-Tempski <piotr@esden.net>")
+  )
+
+  (layers
+    (0 F.Cu signal)
+    (1 In1.Cu signal)
+    (2 In2.Cu signal)
+    (31 B.Cu signal)
+    (34 B.Paste user)
+    (35 F.Paste user)
+    (36 B.SilkS user)
+    (37 F.SilkS user)
+    (38 B.Mask user)
+    (39 F.Mask user)
+    (40 Dwgs.User user)
+    (44 Edge.Cuts user)
+    (46 B.CrtYd user)
+    (47 F.CrtYd user)
+    (48 B.Fab user hide)
+    (49 F.Fab user)
+  )
+
+  (setup
+    (last_trace_width 0.15)
+    (trace_clearance 0.149)
+    (zone_clearance 0.15)
+    (zone_45_only no)
+    (trace_min 0.15)
+    (segment_width 0.2)
+    (edge_width 0.15)
+    (via_size 0.5)
+    (via_drill 0.3)
+    (via_min_size 0.5)
+    (via_min_drill 0.3)
+    (uvia_size 0.3)
+    (uvia_drill 0.1)
+    (uvias_allowed no)
+    (uvia_min_size 0.2)
+    (uvia_min_drill 0.1)
+    (pcb_text_width 0.3)
+    (pcb_text_size 1.5 1.5)
+    (mod_edge_width 0.15)
+    (mod_text_size 1 1)
+    (mod_text_width 0.15)
+    (pad_size 0.5 0.5)
+    (pad_drill 0.3)
+    (pad_to_mask_clearance 0.05)
+    (aux_axis_origin 0 0)
+    (visible_elements FFFFFF7F)
+    (pcbplotparams
+      (layerselection 0x010fc_80000007)
+      (usegerberextensions true)
+      (usegerberattributes false)
+      (usegerberadvancedattributes false)
+      (creategerberjobfile false)
+      (excludeedgelayer true)
+      (linewidth 0.300000)
+      (plotframeref false)
+      (viasonmask false)
+      (mode 1)
+      (useauxorigin false)
+      (hpglpennumber 1)
+      (hpglpenspeed 20)
+      (hpglpendiameter 15)
+      (psnegative false)
+      (psa4output false)
+      (plotreference true)
+      (plotvalue true)
+      (plotinvisibletext false)
+      (padsonsilk false)
+      (subtractmaskfromsilk true)
+      (outputformat 1)
+      (mirror false)
+      (drillshape 0)
+      (scaleselection 1)
+      (outputdirectory gerber))
+  )
+
+  (net 0 "")
+  (net 1 +3V3)
+  (net 2 GND)
+  (net 3 +5V)
+  (net 4 "Net-(C12-Pad1)")
+  (net 5 /XTALOUT)
+  (net 6 /XTALIN)
+  (net 7 /SCL)
+  (net 8 /SDA)
+  (net 9 /PB0)
+  (net 10 /PB1)
+  (net 11 /PB2)
+  (net 12 /PB5)
+  (net 13 /PB6)
+  (net 14 /PB7)
+  (net 15 /~RESET)
+  (net 16 /WAKEUP)
+  (net 17 /PB3)
+  (net 18 /PB4)
+  (net 19 /xPB1)
+  (net 20 /xPB0)
+  (net 21 /xPB3)
+  (net 22 /xPB2)
+  (net 23 /xPB5)
+  (net 24 /xPB4)
+  (net 25 /xPB7)
+  (net 26 /xPB6)
+  (net 27 /shield)
+  (net 28 /USBD_P)
+  (net 29 /xUSBD_P)
+  (net 30 /USBD_N)
+  (net 31 /xUSBD_N)
+  (net 32 /PA1)
+  (net 33 /TRIG)
+  (net 34 /CLK)
+  (net 35 /xTRIG)
+  (net 36 /xCLK)
+  (net 37 /xIFCLK)
+  (net 38 "Net-(J1-Pad13)")
+  (net 39 "Net-(U5-Pad4)")
+  (net 40 "Net-(IC1-Pad2)")
+  (net 41 /IFCLK)
+  (net 42 "Net-(IC1-Pad29)")
+  (net 43 "Net-(IC1-Pad31)")
+  (net 44 "Net-(IC1-Pad33)")
+  (net 45 "Net-(IC1-Pad35)")
+  (net 46 "Net-(IC1-Pad36)")
+  (net 47 "Net-(IC1-Pad37)")
+  (net 48 "Net-(IC1-Pad38)")
+  (net 49 "Net-(IC1-Pad39)")
+  (net 50 "Net-(IC1-Pad40)")
+  (net 51 "Net-(IC1-Pad45)")
+  (net 52 "Net-(IC1-Pad46)")
+  (net 53 "Net-(IC1-Pad47)")
+  (net 54 "Net-(IC1-Pad48)")
+  (net 55 "Net-(IC1-Pad51)")
+  (net 56 "Net-(IC1-Pad52)")
+  (net 57 "Net-(IC1-Pad54)")
+  (net 58 "Net-(IC1-Pad49)")
+  (net 59 "Net-(IC1-Pad50)")
+  (net 60 "Net-(D1-PadC)")
+  (net 61 "Net-(P1-Pad4)")
+
+  (net_class Default "This is the default net class."
+    (clearance 0.149)
+    (trace_width 0.15)
+    (via_dia 0.5)
+    (via_drill 0.3)
+    (uvia_dia 0.3)
+    (uvia_drill 0.1)
+    (add_net +3V3)
+    (add_net +5V)
+    (add_net /CLK)
+    (add_net /IFCLK)
+    (add_net /PA1)
+    (add_net /PB0)
+    (add_net /PB1)
+    (add_net /PB2)
+    (add_net /PB3)
+    (add_net /PB4)
+    (add_net /PB5)
+    (add_net /PB6)
+    (add_net /PB7)
+    (add_net /SCL)
+    (add_net /SDA)
+    (add_net /TRIG)
+    (add_net /USBD_N)
+    (add_net /USBD_P)
+    (add_net /WAKEUP)
+    (add_net /XTALIN)
+    (add_net /XTALOUT)
+    (add_net /shield)
+    (add_net /xCLK)
+    (add_net /xIFCLK)
+    (add_net /xPB0)
+    (add_net /xPB1)
+    (add_net /xPB2)
+    (add_net /xPB3)
+    (add_net /xPB4)
+    (add_net /xPB5)
+    (add_net /xPB6)
+    (add_net /xPB7)
+    (add_net /xTRIG)
+    (add_net /xUSBD_N)
+    (add_net /xUSBD_P)
+    (add_net /~RESET)
+    (add_net GND)
+    (add_net "Net-(C12-Pad1)")
+    (add_net "Net-(D1-PadC)")
+    (add_net "Net-(IC1-Pad2)")
+    (add_net "Net-(IC1-Pad29)")
+    (add_net "Net-(IC1-Pad31)")
+    (add_net "Net-(IC1-Pad33)")
+    (add_net "Net-(IC1-Pad35)")
+    (add_net "Net-(IC1-Pad36)")
+    (add_net "Net-(IC1-Pad37)")
+    (add_net "Net-(IC1-Pad38)")
+    (add_net "Net-(IC1-Pad39)")
+    (add_net "Net-(IC1-Pad40)")
+    (add_net "Net-(IC1-Pad45)")
+    (add_net "Net-(IC1-Pad46)")
+    (add_net "Net-(IC1-Pad47)")
+    (add_net "Net-(IC1-Pad48)")
+    (add_net "Net-(IC1-Pad49)")
+    (add_net "Net-(IC1-Pad50)")
+    (add_net "Net-(IC1-Pad51)")
+    (add_net "Net-(IC1-Pad52)")
+    (add_net "Net-(IC1-Pad54)")
+    (add_net "Net-(J1-Pad13)")
+    (add_net "Net-(P1-Pad4)")
+    (add_net "Net-(U5-Pad4)")
+  )
+
+  (module pkl_samtec:TFM-107-02-x-DH locked (layer F.Cu) (tedit 5AD14EA5) (tstamp 5AD1C9C7)
+    (at 55.4 30 270)
+    (path /59BD0AF3)
+    (fp_text reference J1 (at 0 -4.4 270) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value Conn (at 0 -3 270) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 7.9 -2.1) (end -7.9 -2.1) (layer F.Fab) (width 0.05))
+    (fp_line (start -7.9 -2.1) (end -7.9 4.7) (layer F.Fab) (width 0.05))
+    (fp_line (start -7.9 4.7) (end -4.8 4.7) (layer F.Fab) (width 0.05))
+    (fp_line (start -4.8 4.7) (end -4.8 7.2) (layer F.Fab) (width 0.05))
+    (fp_line (start 7.9 -2.1) (end 7.9 4.7) (layer F.Fab) (width 0.05))
+    (fp_line (start 7.9 4.7) (end 4.8 4.7) (layer F.Fab) (width 0.05))
+    (fp_line (start 4.8 4.7) (end 4.8 7.2) (layer F.Fab) (width 0.05))
+    (fp_line (start -8.3 -1.5) (end 8.3 -1.5) (layer F.Fab) (width 0.05))
+    (fp_line (start -8.15 -2.35) (end 8.15 -2.35) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 8.15 -2.35) (end 8.15 4.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 8.15 4.95) (end 5.05 4.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 5.05 4.95) (end 5.05 7.45) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 5.05 7.45) (end -5.05 7.45) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -5.05 7.45) (end -5.05 4.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -5.05 4.95) (end -8.15 4.95) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -8.15 4.95) (end -8.15 -2.35) (layer F.CrtYd) (width 0.05))
+    (pad 14 smd rect (at -3.81 6.63 270) (size 0.74 1.14) (layers F.Cu F.Paste F.Mask)
+      (net 37 /xIFCLK))
+    (pad 13 smd rect (at -3.81 5.11 270) (size 0.74 1.14) (layers F.Cu F.Paste F.Mask)
+      (net 38 "Net-(J1-Pad13)"))
+    (pad 11 smd rect (at -2.54 5.11 270) (size 0.74 1.14) (layers F.Cu F.Paste F.Mask)
+      (net 35 /xTRIG))
+    (pad 9 smd rect (at -1.27 5.11 270) (size 0.74 1.14) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (pad 7 smd rect (at 0 5.11 270) (size 0.74 1.14) (layers F.Cu F.Paste F.Mask)
+      (net 26 /xPB6))
+    (pad 5 smd rect (at 1.27 5.11 270) (size 0.74 1.14) (layers F.Cu F.Paste F.Mask)
+      (net 24 /xPB4))
+    (pad 3 smd rect (at 2.54 5.11 270) (size 0.74 1.14) (layers F.Cu F.Paste F.Mask)
+      (net 22 /xPB2))
+    (pad 1 smd rect (at 3.81 5.11 270) (size 0.74 1.14) (layers F.Cu F.Paste F.Mask)
+      (net 20 /xPB0))
+    (pad 12 smd rect (at -2.54 6.63 270) (size 0.74 1.14) (layers F.Cu F.Paste F.Mask)
+      (net 36 /xCLK))
+    (pad 10 smd rect (at -1.27 6.63 270) (size 0.74 1.14) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (pad 8 smd rect (at 0 6.63 270) (size 0.74 1.14) (layers F.Cu F.Paste F.Mask)
+      (net 25 /xPB7))
+    (pad 6 smd rect (at 1.27 6.63 270) (size 0.74 1.14) (layers F.Cu F.Paste F.Mask)
+      (net 23 /xPB5))
+    (pad 4 smd rect (at 2.54 6.63 270) (size 0.74 1.14) (layers F.Cu F.Paste F.Mask)
+      (net 21 /xPB3))
+    (pad 2 smd rect (at 3.81 6.63 270) (size 0.74 1.14) (layers F.Cu F.Paste F.Mask)
+      (net 19 /xPB1))
+    (pad "" thru_hole circle (at 6.4 0 270) (size 1.2 1.2) (drill 0.84) (layers *.Cu *.Mask))
+    (pad "" thru_hole circle (at -6.4 0 270) (size 1.2 1.2) (drill 0.84) (layers *.Cu *.Mask))
+    (pad "" thru_hole circle (at -6.4 2.26 270) (size 1.2 1.2) (drill 0.84) (layers *.Cu *.Mask))
+    (pad "" thru_hole circle (at 6.4 2.26 270) (size 1.2 1.2) (drill 0.84) (layers *.Cu *.Mask))
+  )
+
+  (module pkl_dipol:C_0402 (layer F.Cu) (tedit 552C58AA) (tstamp 59BDC0D3)
+    (at 37 36.05 270)
+    (descr "Capacitor SMD 0402, reflow soldering")
+    (tags "capacitor 0402")
+    (path /59BCD014)
+    (attr smd)
+    (fp_text reference C1 (at 0 0 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 100n (at 3.2 0 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_circle (center 0 0) (end 0 -0.085) (layer F.SilkS) (width 0.17))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (model Capacitors_SMD.3dshapes/C_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:C_0402 (layer F.Cu) (tedit 552C58AA) (tstamp 59BDC0E0)
+    (at 40.2 33.5 270)
+    (descr "Capacitor SMD 0402, reflow soldering")
+    (tags "capacitor 0402")
+    (path /59BCD4ED)
+    (attr smd)
+    (fp_text reference C2 (at 0 0 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 100n (at -2.15 0 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_circle (center 0 0) (end 0 -0.085) (layer F.SilkS) (width 0.17))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (model Capacitors_SMD.3dshapes/C_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:C_0402 (layer F.Cu) (tedit 552C58AA) (tstamp 59BDC0ED)
+    (at 40 26.75 90)
+    (descr "Capacitor SMD 0402, reflow soldering")
+    (tags "capacitor 0402")
+    (path /59BCD52C)
+    (attr smd)
+    (fp_text reference C3 (at 0 0 90) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 100n (at 2.15 0 90) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_circle (center 0 0) (end 0 -0.085) (layer F.SilkS) (width 0.17))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (model Capacitors_SMD.3dshapes/C_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:C_0402 (layer F.Cu) (tedit 552C58AA) (tstamp 59BDC0FA)
+    (at 37.1 24.55 90)
+    (descr "Capacitor SMD 0402, reflow soldering")
+    (tags "capacitor 0402")
+    (path /59BCD572)
+    (attr smd)
+    (fp_text reference C4 (at 0 0 90) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 100n (at 0.25 1 90) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_circle (center 0 0) (end 0 -0.085) (layer F.SilkS) (width 0.17))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (model Capacitors_SMD.3dshapes/C_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:C_0402 (layer F.Cu) (tedit 552C58AA) (tstamp 59BDC107)
+    (at 29.55 26.75 180)
+    (descr "Capacitor SMD 0402, reflow soldering")
+    (tags "capacitor 0402")
+    (path /59BCD5BB)
+    (attr smd)
+    (fp_text reference C5 (at 0 0 180) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 100n (at -2.75 0 180) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_circle (center 0 0) (end 0 -0.085) (layer F.SilkS) (width 0.17))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (model Capacitors_SMD.3dshapes/C_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:C_0402 (layer F.Cu) (tedit 552C58AA) (tstamp 59BDC114)
+    (at 30 32.25 90)
+    (descr "Capacitor SMD 0402, reflow soldering")
+    (tags "capacitor 0402")
+    (path /59BCD603)
+    (attr smd)
+    (fp_text reference C6 (at 0 0 90) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 100n (at 2.1 0.15 90) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_circle (center 0 0) (end 0 -0.085) (layer F.SilkS) (width 0.17))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (model Capacitors_SMD.3dshapes/C_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:C_0402 (layer F.Cu) (tedit 552C58AA) (tstamp 59BDC121)
+    (at 33.000001 36.05 270)
+    (descr "Capacitor SMD 0402, reflow soldering")
+    (tags "capacitor 0402")
+    (path /59BCE337)
+    (attr smd)
+    (fp_text reference C7 (at 0 0.000001 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 2u2 (at 2.95 0.000001 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_circle (center 0 0) (end 0 -0.085) (layer F.SilkS) (width 0.17))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (model Capacitors_SMD.3dshapes/C_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:C_0402 (layer F.Cu) (tedit 552C58AA) (tstamp 59BDC12E)
+    (at 36 36.05 270)
+    (descr "Capacitor SMD 0402, reflow soldering")
+    (tags "capacitor 0402")
+    (path /59BCE2D7)
+    (attr smd)
+    (fp_text reference C8 (at 0 0 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 2u2 (at 2.9 0 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_circle (center 0 0) (end 0 -0.085) (layer F.SilkS) (width 0.17))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (model Capacitors_SMD.3dshapes/C_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:C_0402 (layer F.Cu) (tedit 552C58AA) (tstamp 59BDC13B)
+    (at 33.999999 36.05 270)
+    (descr "Capacitor SMD 0402, reflow soldering")
+    (tags "capacitor 0402")
+    (path /59BCE21C)
+    (attr smd)
+    (fp_text reference C9 (at 0 -0.000001 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 100n (at 3.2 -0.000001 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_circle (center 0 0) (end 0 -0.085) (layer F.SilkS) (width 0.17))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (model Capacitors_SMD.3dshapes/C_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:C_0402 (layer F.Cu) (tedit 552C58AA) (tstamp 59BDC148)
+    (at 35 36.05 270)
+    (descr "Capacitor SMD 0402, reflow soldering")
+    (tags "capacitor 0402")
+    (path /59BCE282)
+    (attr smd)
+    (fp_text reference C10 (at 0 0 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 100n (at 3.2 0 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_circle (center 0 0) (end 0 -0.085) (layer F.SilkS) (width 0.17))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (model Capacitors_SMD.3dshapes/C_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:C_0603 (layer F.Cu) (tedit 552C8666) (tstamp 59BDC155)
+    (at 25.7 23.8 180)
+    (descr "Capacitor SMD 0603, reflow soldering")
+    (tags "capacitor 0603")
+    (path /59BCB8FF)
+    (attr smd)
+    (fp_text reference C11 (at 0 0 180) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 4u7 (at 0 1.2 180) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_circle (center 0 0) (end 0 -0.18) (layer F.SilkS) (width 0.36))
+    (fp_line (start -1.175 -0.725) (end 1.175 -0.725) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.175 0.725) (end 1.175 0.725) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.175 -0.725) (end -1.175 0.725) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.175 -0.725) (end 1.175 0.725) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.61) (end 0.35 -0.61) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.61) (end -0.35 0.61) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.75 0 180) (size 0.6 0.9) (layers F.Cu F.Paste F.Mask)
+      (net 3 +5V))
+    (pad 2 smd rect (at 0.75 0 180) (size 0.6 0.9) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (model Capacitors_SMD.3dshapes/C_0603.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:C_0402 (layer F.Cu) (tedit 552C58AA) (tstamp 59BDC162)
+    (at 28 27.3 270)
+    (descr "Capacitor SMD 0402, reflow soldering")
+    (tags "capacitor 0402")
+    (path /59BCBABD)
+    (attr smd)
+    (fp_text reference C12 (at 0 0 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 10n (at 0 1.55 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_circle (center 0 0) (end 0 -0.085) (layer F.SilkS) (width 0.17))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 4 "Net-(C12-Pad1)"))
+    (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (model Capacitors_SMD.3dshapes/C_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:C_0603 (layer F.Cu) (tedit 552C8666) (tstamp 59BDC16F)
+    (at 31.3 24.263544 270)
+    (descr "Capacitor SMD 0603, reflow soldering")
+    (tags "capacitor 0603")
+    (path /59BCBE9F)
+    (attr smd)
+    (fp_text reference C13 (at -0.013544 0 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 4u7 (at -1.713544 0) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_circle (center 0 0) (end 0 -0.18) (layer F.SilkS) (width 0.36))
+    (fp_line (start -1.175 -0.725) (end 1.175 -0.725) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.175 0.725) (end 1.175 0.725) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.175 -0.725) (end -1.175 0.725) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.175 -0.725) (end 1.175 0.725) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.61) (end 0.35 -0.61) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.61) (end -0.35 0.61) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.75 0 270) (size 0.6 0.9) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 2 smd rect (at 0.75 0 270) (size 0.6 0.9) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (model Capacitors_SMD.3dshapes/C_0603.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:C_0402 (layer F.Cu) (tedit 552C58AA) (tstamp 59BDC17C)
+    (at 33.45 24.55 90)
+    (descr "Capacitor SMD 0402, reflow soldering")
+    (tags "capacitor 0402")
+    (path /59BC74C6)
+    (attr smd)
+    (fp_text reference C14 (at 0.05 0 90) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 1u (at 1.65 0 90) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_circle (center 0 0) (end 0 -0.085) (layer F.SilkS) (width 0.17))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 15 /~RESET))
+    (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (model Capacitors_SMD.3dshapes/C_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:C_0402 (layer F.Cu) (tedit 552C58AA) (tstamp 59BDC189)
+    (at 28 32.25 90)
+    (descr "Capacitor SMD 0402, reflow soldering")
+    (tags "capacitor 0402")
+    (path /59BCFFAD)
+    (attr smd)
+    (fp_text reference C15 (at 0 0 90) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 10p (at 0 1 90) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_circle (center 0 0) (end 0 -0.085) (layer F.SilkS) (width 0.17))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 5 /XTALOUT))
+    (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (model Capacitors_SMD.3dshapes/C_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:C_0402 (layer F.Cu) (tedit 552C58AA) (tstamp 59BDC196)
+    (at 31 36.05 270)
+    (descr "Capacitor SMD 0402, reflow soldering")
+    (tags "capacitor 0402")
+    (path /59BCFF16)
+    (attr smd)
+    (fp_text reference C16 (at 0 0 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 10p (at 2.95 0 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_circle (center 0 0) (end 0 -0.085) (layer F.SilkS) (width 0.17))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 6 /XTALIN))
+    (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (model Capacitors_SMD.3dshapes/C_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:D_0603 (layer F.Cu) (tedit 59E171F2) (tstamp 59BDC1A6)
+    (at 35.2 23.7)
+    (descr "Diode SMD 0603, reflow soldering")
+    (tags "diode led 0603")
+    (path /59BC9087)
+    (attr smd)
+    (fp_text reference D1 (at 0 0) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value GRN (at 0 -1.2) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_line (start 0.3 0.3) (end -0.3 0) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.3 -0.3) (end 0.3 0.3) (layer F.SilkS) (width 0.13))
+    (fp_line (start -0.3 0) (end 0.3 -0.3) (layer F.SilkS) (width 0.13))
+    (fp_line (start -0.3 -0.3) (end -0.3 0.3) (layer F.SilkS) (width 0.13))
+    (fp_line (start 1.175 0.725) (end -1.175 0.725) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.175 -0.725) (end -1.175 -0.725) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.175 0.725) (end 1.175 -0.725) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.175 0.725) (end -1.175 -0.725) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.35 0.61) (end -0.35 0.61) (layer F.SilkS) (width 0.13))
+    (fp_line (start -0.35 -0.61) (end 0.35 -0.61) (layer F.SilkS) (width 0.13))
+    (pad A smd rect (at 0.75 0 180) (size 0.6 0.9) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad C smd rect (at -0.75 0 180) (size 0.6 0.9) (layers F.Cu F.Paste F.Mask)
+      (net 60 "Net-(D1-PadC)"))
+    (model LEDs.3dshapes/LED_0603.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_connectors:Connector_USB_Micro_B_SMD locked (layer F.Cu) (tedit 59E16E61) (tstamp 59BDC218)
+    (at 23.5 30 180)
+    (path /59BC7334)
+    (fp_text reference P1 (at 0 0) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value pkl_USB_OTG (at 2.25 0 270) (layer F.Fab) hide
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_line (start 1.45 4.8) (end 1.45 -4.8) (layer F.Fab) (width 0.15))
+    (fp_line (start 2.7 4.8) (end -3.45 4.8) (layer F.CrtYd) (width 0.1))
+    (fp_line (start 2.7 -4.8) (end 2.7 4.8) (layer F.CrtYd) (width 0.1))
+    (fp_line (start -3.45 -4.8) (end 2.7 -4.8) (layer F.CrtYd) (width 0.1))
+    (fp_line (start -3.45 4.8) (end -3.45 -4.8) (layer F.CrtYd) (width 0.1))
+    (fp_line (start 2.15 3) (end 2.6 3) (layer F.SilkS) (width 0.15))
+    (fp_line (start 2.15 3.25) (end 2.15 3) (layer F.SilkS) (width 0.15))
+    (fp_line (start 2.6 3.7) (end 2.15 3.25) (layer F.SilkS) (width 0.15))
+    (fp_line (start 2.35 3.95) (end 2.6 3.7) (layer F.SilkS) (width 0.15))
+    (fp_line (start 2.15 3.75) (end 2.35 3.95) (layer F.SilkS) (width 0.15))
+    (fp_line (start 2.15 -3) (end 2.6 -3) (layer F.SilkS) (width 0.15))
+    (fp_line (start 2.15 -3.25) (end 2.15 -3) (layer F.SilkS) (width 0.15))
+    (fp_line (start 2.6 -3.7) (end 2.15 -3.25) (layer F.SilkS) (width 0.15))
+    (fp_line (start 2.35 -3.95) (end 2.6 -3.7) (layer F.SilkS) (width 0.15))
+    (fp_line (start 2.15 -3.75) (end 2.35 -3.95) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.45 3.75) (end 2.15 3.75) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.45 3.9) (end 0.45 3.75) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.45 3.9) (end 0.45 3.9) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.45 3.75) (end -0.45 3.9) (layer F.SilkS) (width 0.15))
+    (fp_line (start 2.6 3) (end 2.6 -3) (layer F.SilkS) (width 0.15))
+    (fp_line (start -2.9 3.75) (end -0.45 3.75) (layer F.SilkS) (width 0.15))
+    (fp_line (start -2.9 -3.75) (end -0.45 -3.75) (layer F.SilkS) (width 0.15))
+    (fp_line (start -2.9 3.75) (end -2.9 -3.75) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.45 -3.75) (end -0.45 -3.85) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.45 -3.85) (end 0.45 -3.85) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.45 -3.85) (end 0.45 -3.75) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.45 -3.75) (end 2.15 -3.75) (layer F.SilkS) (width 0.15))
+    (pad GND smd rect (at 0 1.2 270) (size 1.9 1.9) (layers F.Cu F.Paste F.Mask)
+      (net 27 /shield))
+    (pad GND smd rect (at 0 -1.2 270) (size 1.9 1.9) (layers F.Cu F.Paste F.Mask)
+      (net 27 /shield))
+    (pad GND smd rect (at 0 -3.8 270) (size 1.8 1.9) (layers F.Cu F.Paste F.Mask)
+      (net 27 /shield))
+    (pad GND smd rect (at 0 3.8 270) (size 1.8 1.9) (layers F.Cu F.Paste F.Mask)
+      (net 27 /shield))
+    (pad GND smd rect (at -2.55 -3.1 270) (size 2.1 1.6) (layers F.Cu F.Paste F.Mask)
+      (net 27 /shield))
+    (pad GND smd rect (at -2.55 3.1 270) (size 2.1 1.6) (layers F.Cu F.Paste F.Mask)
+      (net 27 /shield))
+    (pad 1 smd rect (at -2.675 1.3 270) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask)
+      (net 3 +5V))
+    (pad 2 smd rect (at -2.675 0.65 270) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask)
+      (net 31 /xUSBD_N))
+    (pad 3 smd rect (at -2.675 0 270) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask)
+      (net 29 /xUSBD_P))
+    (pad 4 smd rect (at -2.675 -0.65 270) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask)
+      (net 61 "Net-(P1-Pad4)"))
+    (pad 5 smd rect (at -2.675 -1.3 270) (size 0.4 1.35) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (model Connectors_USB.3dshapes/USB_Micro-B_Molex_47346-0001.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 270))
+    )
+  )
+
+  (module pkl_dipol:R_0402 (layer F.Cu) (tedit 552C709B) (tstamp 59BDC225)
+    (at 35.2 25)
+    (descr "Resistor SMD 0402, reflow soldering")
+    (tags "resistor 0402")
+    (path /59BC91D9)
+    (attr smd)
+    (fp_text reference R1 (at 0 0) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 2k7 (at 0 1.55) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_poly (pts (xy -0.1 0.25) (xy -0.1 -0.25) (xy 0.1 -0.25) (xy 0.1 0.25)
+      (xy -0.1 0.25)) (layer F.SilkS) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 60 "Net-(D1-PadC)"))
+    (pad 2 smd rect (at 0.5 0) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 32 /PA1))
+    (model Resistors_SMD.3dshapes/R_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:R_0402 (layer F.Cu) (tedit 552C709B) (tstamp 59BDC232)
+    (at 38 36.05 270)
+    (descr "Resistor SMD 0402, reflow soldering")
+    (tags "resistor 0402")
+    (path /59BC75BC)
+    (attr smd)
+    (fp_text reference R2 (at 0 0 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 2k7 (at 2.9 0 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_poly (pts (xy -0.1 0.25) (xy -0.1 -0.25) (xy 0.1 -0.25) (xy 0.1 0.25)
+      (xy -0.1 0.25)) (layer F.SilkS) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 7 /SCL))
+    (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (model Resistors_SMD.3dshapes/R_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:R_0402 (layer F.Cu) (tedit 552C709B) (tstamp 59BDC23F)
+    (at 39 36.05 270)
+    (descr "Resistor SMD 0402, reflow soldering")
+    (tags "resistor 0402")
+    (path /59BC802B)
+    (attr smd)
+    (fp_text reference R3 (at 0 0 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 2k7 (at 2.9 0 270) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_poly (pts (xy -0.1 0.25) (xy -0.1 -0.25) (xy 0.1 -0.25) (xy 0.1 0.25)
+      (xy -0.1 0.25)) (layer F.SilkS) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 8 /SDA))
+    (pad 2 smd rect (at 0.5 0 270) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (model Resistors_SMD.3dshapes/R_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:R_0402 (layer F.Cu) (tedit 552C709B) (tstamp 59BDC24C)
+    (at 32.45 24.55 90)
+    (descr "Resistor SMD 0402, reflow soldering")
+    (tags "resistor 0402")
+    (path /59BC8237)
+    (attr smd)
+    (fp_text reference R4 (at 0.05 0 90) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 2k7 (at 3.5 0 90) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_poly (pts (xy -0.1 0.25) (xy -0.1 -0.25) (xy 0.1 -0.25) (xy 0.1 0.25)
+      (xy -0.1 0.25)) (layer F.SilkS) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 15 /~RESET))
+    (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (model Resistors_SMD.3dshapes/R_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:R_0402 (layer F.Cu) (tedit 552C709B) (tstamp 59BDC259)
+    (at 29.55 27.75 180)
+    (descr "Resistor SMD 0402, reflow soldering")
+    (tags "resistor 0402")
+    (path /59BC827F)
+    (attr smd)
+    (fp_text reference R5 (at 0 0 180) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 100k (at -2.7 -0.05 180) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_poly (pts (xy -0.1 0.25) (xy -0.1 -0.25) (xy 0.1 -0.25) (xy 0.1 0.25)
+      (xy -0.1 0.25)) (layer F.SilkS) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0 180) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 16 /WAKEUP))
+    (pad 2 smd rect (at 0.5 0 180) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (model Resistors_SMD.3dshapes/R_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:R_Array_Convex_4x0402 (layer F.Cu) (tedit 59E17122) (tstamp 59BDC313)
+    (at 42.7 35.2 180)
+    (descr "Thick Film Chip Resistor Array, Wave soldering, Vishay CRA06P (see cra06p.pdf)")
+    (tags "resistor array")
+    (path /59BEE4FF)
+    (attr smd)
+    (fp_text reference R8 (at 0 0) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 100k (at 0 1.3) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_line (start -1 0.5) (end -1 -0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.55 0.5) (end -1 0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.55 0.3) (end -0.55 0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.4 0.3) (end -0.55 0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.4 0.5) (end -0.4 0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.1 0.5) (end -0.4 0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.1 0.3) (end -0.1 0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.1 0.3) (end -0.1 0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.1 0.5) (end 0.1 0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.4 0.5) (end 0.1 0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.4 0.3) (end 0.4 0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.55 0.3) (end 0.4 0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.55 0.5) (end 0.55 0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start 1 0.5) (end 0.55 0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start 1 -0.5) (end 1 0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.55 -0.5) (end 1 -0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.55 -0.3) (end 0.55 -0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.4 -0.3) (end 0.55 -0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.4 -0.5) (end 0.4 -0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.1 -0.5) (end 0.4 -0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.1 -0.3) (end 0.1 -0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.1 -0.3) (end 0.1 -0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.1 -0.5) (end -0.1 -0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.4 -0.5) (end -0.1 -0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.4 -0.3) (end -0.4 -0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.55 -0.3) (end -0.4 -0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.55 -0.5) (end -0.55 -0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start -1 -0.5) (end -0.55 -0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.85 0.1) (end 0.65 0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.85 -0.1) (end 0.85 0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.65 -0.1) (end 0.85 -0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.65 0.1) (end 0.65 -0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.35 0.1) (end 0.15 0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.35 -0.1) (end 0.35 0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.15 -0.1) (end 0.35 -0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.15 0.1) (end 0.15 -0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.15 0.1) (end -0.35 0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.15 -0.1) (end -0.15 0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.35 -0.1) (end -0.15 -0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.35 0.1) (end -0.35 -0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.65 0.1) (end -0.85 0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.65 -0.1) (end -0.65 0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.85 -0.1) (end -0.65 -0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.85 0.1) (end -0.85 -0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.1 0.85) (end -1.1 -0.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.1 0.85) (end 1.1 -0.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.1 0.85) (end 1.1 0.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.1 -0.85) (end 1.1 -0.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.075 -0.4) (end 1.075 0.4) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.075 -0.4) (end -1.075 0.4) (layer F.SilkS) (width 0.15))
+    (pad 3 smd rect (at -0.25 0.475 180) (size 0.3 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 10 /PB1))
+    (pad 5 smd rect (at 0.25 0.475 180) (size 0.3 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 11 /PB2))
+    (pad 1 smd rect (at -0.75 0.475 180) (size 0.4 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 9 /PB0))
+    (pad 7 smd rect (at 0.75 0.475 180) (size 0.4 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 17 /PB3))
+    (pad 2 smd rect (at -0.75 -0.475 180) (size 0.4 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 4 smd rect (at -0.25 -0.475 180) (size 0.3 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 6 smd rect (at 0.25 -0.475 180) (size 0.3 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 8 smd rect (at 0.75 -0.475 180) (size 0.4 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (model Resistors_SMD.3dshapes/R_Array_Convex_4x0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 90))
+    )
+  )
+
+  (module pkl_dipol:R_Array_Convex_4x0402 (layer F.Cu) (tedit 59E171CC) (tstamp 59BDC351)
+    (at 42.7 27.4)
+    (descr "Thick Film Chip Resistor Array, Wave soldering, Vishay CRA06P (see cra06p.pdf)")
+    (tags "resistor array")
+    (path /59BEEBEA)
+    (attr smd)
+    (fp_text reference R9 (at 0 0 180) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 100k (at 0 -1.3) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_line (start -1 0.5) (end -1 -0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.55 0.5) (end -1 0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.55 0.3) (end -0.55 0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.4 0.3) (end -0.55 0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.4 0.5) (end -0.4 0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.1 0.5) (end -0.4 0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.1 0.3) (end -0.1 0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.1 0.3) (end -0.1 0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.1 0.5) (end 0.1 0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.4 0.5) (end 0.1 0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.4 0.3) (end 0.4 0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.55 0.3) (end 0.4 0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.55 0.5) (end 0.55 0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start 1 0.5) (end 0.55 0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start 1 -0.5) (end 1 0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.55 -0.5) (end 1 -0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.55 -0.3) (end 0.55 -0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.4 -0.3) (end 0.55 -0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.4 -0.5) (end 0.4 -0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.1 -0.5) (end 0.4 -0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.1 -0.3) (end 0.1 -0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.1 -0.3) (end 0.1 -0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.1 -0.5) (end -0.1 -0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.4 -0.5) (end -0.1 -0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.4 -0.3) (end -0.4 -0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.55 -0.3) (end -0.4 -0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start -0.55 -0.5) (end -0.55 -0.3) (layer F.Fab) (width 0.05))
+    (fp_line (start -1 -0.5) (end -0.55 -0.5) (layer F.Fab) (width 0.05))
+    (fp_line (start 0.85 0.1) (end 0.65 0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.85 -0.1) (end 0.85 0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.65 -0.1) (end 0.85 -0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.65 0.1) (end 0.65 -0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.35 0.1) (end 0.15 0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.35 -0.1) (end 0.35 0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.15 -0.1) (end 0.35 -0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.15 0.1) (end 0.15 -0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.15 0.1) (end -0.35 0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.15 -0.1) (end -0.15 0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.35 -0.1) (end -0.15 -0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.35 0.1) (end -0.35 -0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.65 0.1) (end -0.85 0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.65 -0.1) (end -0.65 0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.85 -0.1) (end -0.65 -0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.85 0.1) (end -0.85 -0.1) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.1 0.85) (end -1.1 -0.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.1 0.85) (end 1.1 -0.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.1 0.85) (end 1.1 0.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.1 -0.85) (end 1.1 -0.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.075 -0.4) (end 1.075 0.4) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.075 -0.4) (end -1.075 0.4) (layer F.SilkS) (width 0.15))
+    (pad 3 smd rect (at -0.25 0.475) (size 0.3 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 12 /PB5))
+    (pad 5 smd rect (at 0.25 0.475) (size 0.3 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 13 /PB6))
+    (pad 1 smd rect (at -0.75 0.475) (size 0.4 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 18 /PB4))
+    (pad 7 smd rect (at 0.75 0.475) (size 0.4 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 14 /PB7))
+    (pad 2 smd rect (at -0.75 -0.475) (size 0.4 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 4 smd rect (at -0.25 -0.475) (size 0.3 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 6 smd rect (at 0.25 -0.475) (size 0.3 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 8 smd rect (at 0.75 -0.475) (size 0.4 0.45) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (model Resistors_SMD.3dshapes/R_Array_Convex_4x0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 90))
+    )
+  )
+
+  (module pkl_housings_sot:SOT-23-5 (layer F.Cu) (tedit 59E16E76) (tstamp 59BDC35A)
+    (at 28.8 24.6 180)
+    (descr "5-pin SOT23 package")
+    (tags SOT-23-5)
+    (path /59BCA11B)
+    (attr smd)
+    (fp_text reference U1 (at 0 -0.6 180) (layer F.Fab)
+      (effects (font (size 0.75 0.75) (thickness 0.15)))
+    )
+    (fp_text value 3.3V (at 0 0.7 180) (layer F.Fab)
+      (effects (font (size 0.75 0.75) (thickness 0.15)))
+    )
+    (fp_line (start 1.8 1.6) (end -1.8 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.8 1.6) (end -1.8 -1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.8 -1.6) (end 1.8 -1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.8 -1.6) (end 1.8 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_circle (center 0.3 1.7) (end 0.2 1.7) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.25 1.45) (end 0.25 1.45) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.25 -1.45) (end -0.25 1.45) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.25 -1.45) (end -0.25 -1.45) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.25 1.45) (end 0.25 -1.45) (layer F.SilkS) (width 0.15))
+    (pad 1 smd rect (at 1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
+      (net 3 +5V))
+    (pad 2 smd rect (at 1.1 0) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (pad 3 smd rect (at 1.1 -0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
+      (net 3 +5V))
+    (pad 4 smd rect (at -1.1 -0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
+      (net 4 "Net-(C12-Pad1)"))
+    (pad 5 smd rect (at -1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (model TO_SOT_Packages_SMD.3dshapes/SOT-23-5.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 180))
+    )
+  )
+
+  (module pkl_housings_sot:SOT-666 (layer F.Cu) (tedit 59E16F22) (tstamp 59BDC364)
+    (at 28.5 29.7 180)
+    (descr "Based on DiodesInc and NXP proposed footprints")
+    (path /59BD7AC3)
+    (solder_mask_margin 0.075)
+    (fp_text reference U2 (at 0 -0.5 180) (layer F.Fab)
+      (effects (font (size 0.75 0.75) (thickness 0.15)))
+    )
+    (fp_text value USBLC6-2 (at 0.05 0.45 180) (layer F.Fab)
+      (effects (font (size 0.3 0.3) (thickness 0.0625)))
+    )
+    (fp_line (start 0.8 1) (end -0.8 1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.8 0.85) (end 0.8 1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.25 0.85) (end 0.8 0.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.25 -0.85) (end 1.25 0.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.8 -0.85) (end 1.25 -0.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.8 -1) (end 0.8 -0.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.8 -1) (end 0.8 -1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.8 -0.85) (end -0.8 -1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.25 -0.85) (end -0.8 -0.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.25 0.85) (end -1.25 -0.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.8 0.85) (end -1.25 0.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.8 1) (end -0.8 0.85) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.35 0.5) (end 0.05 0.65) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.05 0.35) (end 0.35 0.5) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.05 0.65) (end 0.05 0.35) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.65 0.85) (end -0.65 0.85) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.65 0.8) (end 0.65 0.85) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.65 -0.85) (end 0.65 -0.8) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.65 -0.85) (end 0.65 -0.85) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.65 -0.8) (end -0.65 -0.85) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.65 0.85) (end -0.65 0.8) (layer F.SilkS) (width 0.15))
+    (pad 1 smd oval (at 0.85 0.5 270) (size 0.375 0.7) (layers F.Cu F.Paste F.Mask)
+      (net 31 /xUSBD_N))
+    (pad 2 smd oval (at 0.85 0 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (pad 3 smd oval (at 0.85 -0.5 270) (size 0.375 0.7) (layers F.Cu F.Paste F.Mask)
+      (net 29 /xUSBD_P))
+    (pad 4 smd oval (at -0.85 -0.5 270) (size 0.375 0.7) (layers F.Cu F.Paste F.Mask)
+      (net 28 /USBD_P))
+    (pad 5 smd oval (at -0.85 0 270) (size 0.3 0.7) (layers F.Cu F.Paste F.Mask)
+      (net 3 +5V))
+    (pad 6 smd oval (at -0.85 0.5 270) (size 0.35 0.7) (layers F.Cu F.Paste F.Mask)
+      (net 30 /USBD_N))
+    (model walter/smd_trans/sot323-6.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 0.75 0.75 0.75))
+      (rotate (xyz 0 0 90))
+    )
+  )
+
+  (module pkl_misc:ABM8 (layer F.Cu) (tedit 59E16F81) (tstamp 59BDC389)
+    (at 28.9 35.1 270)
+    (path /59BCF405)
+    (fp_text reference X1 (at 0 0) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value 24MHz (at 1.05 0) (layer F.Fab)
+      (effects (font (size 0.5 0.5) (thickness 0.125)))
+    )
+    (fp_line (start -1.75 -1.4) (end 1.75 -1.4) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.75 1.4) (end -1.75 -1.4) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.75 1.4) (end -1.75 1.4) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.75 -1.4) (end 1.75 1.4) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.25 0.15) (end -0.25 1.25) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.6 0.15) (end -0.25 0.15) (layer F.SilkS) (width 0.15))
+    (fp_line (start -1.6 -0.25) (end -1.6 0.25) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.35 -1.25) (end -0.35 -1.25) (layer F.SilkS) (width 0.15))
+    (fp_line (start 1.6 0.25) (end 1.6 -0.25) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.35 1.25) (end 0.35 1.25) (layer F.SilkS) (width 0.15))
+    (pad 1 smd rect (at -1.15 0.925 270) (size 1.3 1.05) (layers F.Cu F.Paste F.Mask)
+      (net 5 /XTALOUT))
+    (pad 2 smd rect (at 1.15 -0.925 270) (size 1.3 1.05) (layers F.Cu F.Paste F.Mask)
+      (net 6 /XTALIN))
+    (pad GND smd rect (at -1.15 -0.925 270) (size 1.3 1.05) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (pad GND smd rect (at 1.15 0.925 270) (size 1.3 1.05) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (model walter/crystal/crystal_fa-128.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1.6 1.6 1.6))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:R_0402 (layer F.Cu) (tedit 552C709B) (tstamp 59BDD839)
+    (at 24 35.9)
+    (descr "Resistor SMD 0402, reflow soldering")
+    (tags "resistor 0402")
+    (path /59C0629D)
+    (attr smd)
+    (fp_text reference R10 (at 0 0) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 1m (at 1.85 0) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_poly (pts (xy -0.1 0.25) (xy -0.1 -0.25) (xy 0.1 -0.25) (xy 0.1 0.25)
+      (xy -0.1 0.25)) (layer F.SilkS) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 27 /shield))
+    (pad 2 smd rect (at 0.5 0) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (model Resistors_SMD.3dshapes/R_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_dipol:R_0402 (layer F.Cu) (tedit 552C709B) (tstamp 59D9A4F6)
+    (at 32 36.05 90)
+    (descr "Resistor SMD 0402, reflow soldering")
+    (tags "resistor 0402")
+    (path /59DCFBF6)
+    (attr smd)
+    (fp_text reference R6 (at 0 0 90) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value 100k (at -3.2 0 90) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_poly (pts (xy -0.1 0.25) (xy -0.1 -0.25) (xy 0.1 -0.25) (xy 0.1 0.25)
+      (xy -0.1 0.25)) (layer F.SilkS) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end 0.95 -0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.95 -0.5) (end -0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 0.95 -0.5) (end 0.95 0.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.35 -0.44) (end 0.35 -0.44) (layer F.SilkS) (width 0.13))
+    (fp_line (start 0.35 0.44) (end -0.35 0.44) (layer F.SilkS) (width 0.13))
+    (pad 1 smd rect (at -0.5 0 90) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 2 smd rect (at 0.5 0 90) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 33 /TRIG))
+    (model Resistors_SMD.3dshapes/R_0402.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_housings_sot:SOT-23-5 (layer F.Cu) (tedit 59E17112) (tstamp 59BDC381)
+    (at 46.1 35.6 180)
+    (descr "5-pin SOT23 package")
+    (tags SOT-23-5)
+    (path /59BF5012)
+    (attr smd)
+    (fp_text reference U5 (at 0 0 180) (layer F.Fab)
+      (effects (font (size 0.75 0.75) (thickness 0.15)))
+    )
+    (fp_text value 24LC00 (at 0 -0.95 180) (layer F.Fab)
+      (effects (font (size 0.5 0.5) (thickness 0.125)))
+    )
+    (fp_line (start 1.8 1.6) (end -1.8 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.8 1.6) (end -1.8 -1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.8 -1.6) (end 1.8 -1.6) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.8 -1.6) (end 1.8 1.6) (layer F.CrtYd) (width 0.05))
+    (fp_circle (center 0.3 1.7) (end 0.2 1.7) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.25 1.45) (end 0.25 1.45) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.25 -1.45) (end -0.25 1.45) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.25 -1.45) (end -0.25 -1.45) (layer F.SilkS) (width 0.15))
+    (fp_line (start 0.25 1.45) (end 0.25 -1.45) (layer F.SilkS) (width 0.15))
+    (pad 1 smd rect (at 1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
+      (net 7 /SCL))
+    (pad 2 smd rect (at 1.1 0) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (pad 3 smd rect (at 1.1 -0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
+      (net 8 /SDA))
+    (pad 4 smd rect (at -1.1 -0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
+      (net 39 "Net-(U5-Pad4)"))
+    (pad 5 smd rect (at -1.1 0.95) (size 1.06 0.65) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (model TO_SOT_Packages_SMD.3dshapes/SOT-23-5.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 1 1 1))
+      (rotate (xyz 0 0 180))
+    )
+  )
+
+  (module pkl_housings_dfn_qfn:DFN-8-1EP_1.35x1.7mm_Pitch0.4mm (layer F.Cu) (tedit 59E1719D) (tstamp 59D987E2)
+    (at 45.7 27.15)
+    (descr "DC8 Package 8-Lead Plastic DFN (1.35mm x 1.7mm)")
+    (tags "DFN 0.45")
+    (path /59DB897C)
+    (attr smd)
+    (fp_text reference U6 (at 0 0.05) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value IP425x-4-TTL (at -1.45 0 90) (layer F.Fab)
+      (effects (font (size 0.25 0.25) (thickness 0.0625)))
+    )
+    (fp_line (start -0.375 -0.85) (end 0.675 -0.85) (layer F.Fab) (width 0.15))
+    (fp_line (start 0.675 -0.85) (end 0.675 0.85) (layer F.Fab) (width 0.15))
+    (fp_line (start 0.675 0.85) (end -0.675 0.85) (layer F.Fab) (width 0.15))
+    (fp_line (start -0.675 0.85) (end -0.675 -0.55) (layer F.Fab) (width 0.15))
+    (fp_line (start -0.675 -0.55) (end -0.375 -0.85) (layer F.Fab) (width 0.15))
+    (fp_line (start -1.1 -1.1) (end -1.1 1.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.1 -1.1) (end 1.1 1.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.1 -1.1) (end 1.1 -1.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.1 1.1) (end 1.1 1.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.7 0.9) (end 0.7 0.9) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.9 -0.9) (end 0.3 -0.9) (layer F.SilkS) (width 0.15))
+    (pad 1 smd oval (at -0.675 -0.6) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 41 /IFCLK))
+    (pad 2 smd oval (at -0.675 -0.2) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 33 /TRIG))
+    (pad 3 smd oval (at -0.675 0.2) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 34 /CLK))
+    (pad 4 smd oval (at -0.675 0.6) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask))
+    (pad 5 smd oval (at 0.675 0.6) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask))
+    (pad 6 smd oval (at 0.675 0.2) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 36 /xCLK))
+    (pad 7 smd oval (at 0.675 -0.2) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 35 /xTRIG))
+    (pad 8 smd oval (at 0.675 -0.6) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 37 /xIFCLK))
+    (pad 9 smd rect (at 0 0.3) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND) (solder_paste_margin_ratio -0.2))
+    (pad 9 smd rect (at 0 -0.3) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND) (solder_paste_margin_ratio -0.2))
+    (model Housings_DFN_QFN.3dshapes/DFN-8-1EP_2x2mm_Pitch0.45mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 0.74 0.9 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_housings_dfn_qfn:DFN-8-1EP_1.35x1.7mm_Pitch0.4mm (layer F.Cu) (tedit 59E1718D) (tstamp 59D987C9)
+    (at 45.7 30)
+    (descr "DC8 Package 8-Lead Plastic DFN (1.35mm x 1.7mm)")
+    (tags "DFN 0.45")
+    (path /59DB6426)
+    (attr smd)
+    (fp_text reference U4 (at 0 0) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value IP425x-4-TTL (at -1.45 0 90) (layer F.Fab)
+      (effects (font (size 0.25 0.25) (thickness 0.0625)))
+    )
+    (fp_line (start -0.375 -0.85) (end 0.675 -0.85) (layer F.Fab) (width 0.15))
+    (fp_line (start 0.675 -0.85) (end 0.675 0.85) (layer F.Fab) (width 0.15))
+    (fp_line (start 0.675 0.85) (end -0.675 0.85) (layer F.Fab) (width 0.15))
+    (fp_line (start -0.675 0.85) (end -0.675 -0.55) (layer F.Fab) (width 0.15))
+    (fp_line (start -0.675 -0.55) (end -0.375 -0.85) (layer F.Fab) (width 0.15))
+    (fp_line (start -1.1 -1.1) (end -1.1 1.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.1 -1.1) (end 1.1 1.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.1 -1.1) (end 1.1 -1.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.1 1.1) (end 1.1 1.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.7 0.9) (end 0.7 0.9) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.9 -0.9) (end 0.3 -0.9) (layer F.SilkS) (width 0.15))
+    (pad 1 smd oval (at -0.675 -0.6) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 14 /PB7))
+    (pad 2 smd oval (at -0.675 -0.2) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 13 /PB6))
+    (pad 3 smd oval (at -0.675 0.2) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 12 /PB5))
+    (pad 4 smd oval (at -0.675 0.6) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 18 /PB4))
+    (pad 5 smd oval (at 0.675 0.6) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 24 /xPB4))
+    (pad 6 smd oval (at 0.675 0.2) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 23 /xPB5))
+    (pad 7 smd oval (at 0.675 -0.2) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 26 /xPB6))
+    (pad 8 smd oval (at 0.675 -0.6) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 25 /xPB7))
+    (pad 9 smd rect (at 0 0.3) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND) (solder_paste_margin_ratio -0.2))
+    (pad 9 smd rect (at 0 -0.3) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND) (solder_paste_margin_ratio -0.2))
+    (model Housings_DFN_QFN.3dshapes/DFN-8-1EP_2x2mm_Pitch0.45mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 0.74 0.9 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_housings_dfn_qfn:DFN-8-1EP_1.35x1.7mm_Pitch0.4mm (layer F.Cu) (tedit 59E17159) (tstamp 59D987B0)
+    (at 45.7 32.85)
+    (descr "DC8 Package 8-Lead Plastic DFN (1.35mm x 1.7mm)")
+    (tags "DFN 0.45")
+    (path /59DAD9E0)
+    (attr smd)
+    (fp_text reference U3 (at 0 0.05) (layer F.Fab)
+      (effects (font (size 0.635 0.635) (thickness 0.1)))
+    )
+    (fp_text value IP425x-4-TTL (at -1.45 0 90) (layer F.Fab)
+      (effects (font (size 0.25 0.25) (thickness 0.0625)))
+    )
+    (fp_line (start -0.375 -0.85) (end 0.675 -0.85) (layer F.Fab) (width 0.15))
+    (fp_line (start 0.675 -0.85) (end 0.675 0.85) (layer F.Fab) (width 0.15))
+    (fp_line (start 0.675 0.85) (end -0.675 0.85) (layer F.Fab) (width 0.15))
+    (fp_line (start -0.675 0.85) (end -0.675 -0.55) (layer F.Fab) (width 0.15))
+    (fp_line (start -0.675 -0.55) (end -0.375 -0.85) (layer F.Fab) (width 0.15))
+    (fp_line (start -1.1 -1.1) (end -1.1 1.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 1.1 -1.1) (end 1.1 1.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.1 -1.1) (end 1.1 -1.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -1.1 1.1) (end 1.1 1.1) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -0.7 0.9) (end 0.7 0.9) (layer F.SilkS) (width 0.15))
+    (fp_line (start -0.9 -0.9) (end 0.3 -0.9) (layer F.SilkS) (width 0.15))
+    (pad 1 smd oval (at -0.675 -0.6) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 17 /PB3))
+    (pad 2 smd oval (at -0.675 -0.2) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 11 /PB2))
+    (pad 3 smd oval (at -0.675 0.2) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 10 /PB1))
+    (pad 4 smd oval (at -0.675 0.6) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 9 /PB0))
+    (pad 5 smd oval (at 0.675 0.6) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 20 /xPB0))
+    (pad 6 smd oval (at 0.675 0.2) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 19 /xPB1))
+    (pad 7 smd oval (at 0.675 -0.2) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 22 /xPB2))
+    (pad 8 smd oval (at 0.675 -0.6) (size 0.5 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 21 /xPB3))
+    (pad 9 smd rect (at 0 0.3) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND) (solder_paste_margin_ratio -0.2))
+    (pad 9 smd rect (at 0 -0.3) (size 0.5 0.6) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND) (solder_paste_margin_ratio -0.2))
+    (model Housings_DFN_QFN.3dshapes/DFN-8-1EP_2x2mm_Pitch0.45mm.wrl
+      (at (xyz 0 0 0))
+      (scale (xyz 0.74 0.9 1))
+      (rotate (xyz 0 0 0))
+    )
+  )
+
+  (module pkl_housings_dfn_qfn:QFN-56-1EP_8x8mm_Pitch0.5mm locked (layer F.Cu) (tedit 59E17314) (tstamp 59BDC1FB)
+    (at 35 30 90)
+    (descr "UKG Package; 56-Lead Plastic QFN (8mm x 8mm); (see Linear Technology QFN_52_05-08-1729.pdf)")
+    (tags "QFN 0.5")
+    (path /59BC7288)
+    (attr smd)
+    (fp_text reference IC1 (at 0 0 180) (layer F.Fab)
+      (effects (font (size 1 1) (thickness 0.15)))
+    )
+    (fp_text value CY7C68013A-56 (at -1.6 0 180) (layer F.Fab)
+      (effects (font (size 0.5 0.5) (thickness 0.1)))
+    )
+    (fp_line (start -3 -4) (end 4 -4) (layer F.Fab) (width 0.15))
+    (fp_line (start 4 -4) (end 4 4) (layer F.Fab) (width 0.15))
+    (fp_line (start 4 4) (end -4 4) (layer F.Fab) (width 0.15))
+    (fp_line (start -4 4) (end -4 -3) (layer F.Fab) (width 0.15))
+    (fp_line (start -4 -3) (end -3 -4) (layer F.Fab) (width 0.15))
+    (fp_line (start -4.5 -4.5) (end -4.5 4.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 4.5 -4.5) (end 4.5 4.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -4.5 -4.5) (end 4.5 -4.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start -4.5 4.5) (end 4.5 4.5) (layer F.CrtYd) (width 0.05))
+    (fp_line (start 4.125 -4.125) (end 4.125 -3.6) (layer F.SilkS) (width 0.15))
+    (fp_line (start -4.125 4.125) (end -4.125 3.6) (layer F.SilkS) (width 0.15))
+    (fp_line (start 4.125 4.125) (end 4.125 3.6) (layer F.SilkS) (width 0.15))
+    (fp_line (start -4.125 -4.125) (end -3.6 -4.125) (layer F.SilkS) (width 0.15))
+    (fp_line (start -4.125 4.125) (end -3.6 4.125) (layer F.SilkS) (width 0.15))
+    (fp_line (start 4.125 4.125) (end 3.6 4.125) (layer F.SilkS) (width 0.15))
+    (fp_line (start 4.125 -4.125) (end 3.6 -4.125) (layer F.SilkS) (width 0.15))
+    (pad 1 smd oval (at -3.9 -3.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 33 /TRIG))
+    (pad 2 smd oval (at -3.9 -2.75 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 40 "Net-(IC1-Pad2)"))
+    (pad 3 smd oval (at -3.9 -2.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 4 smd oval (at -3.9 -1.75 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 5 /XTALOUT))
+    (pad 5 smd oval (at -3.9 -1.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 6 /XTALIN))
+    (pad 6 smd oval (at -3.9 -0.75 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (pad 7 smd oval (at -3.9 -0.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 8 smd oval (at -3.9 0.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 28 /USBD_P))
+    (pad 9 smd oval (at -3.9 0.75 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 30 /USBD_N))
+    (pad 10 smd oval (at -3.9 1.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (pad 11 smd oval (at -3.9 1.75 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 12 smd oval (at -3.9 2.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (pad 13 smd oval (at -3.9 2.75 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 41 /IFCLK))
+    (pad 14 smd oval (at -3.9 3.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (pad 15 smd oval (at -3.25 3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 7 /SCL))
+    (pad 16 smd oval (at -2.75 3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 8 /SDA))
+    (pad 17 smd oval (at -2.25 3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 18 smd oval (at -1.75 3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 9 /PB0))
+    (pad 19 smd oval (at -1.25 3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 10 /PB1))
+    (pad 20 smd oval (at -0.75 3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 11 /PB2))
+    (pad 23 smd oval (at 0.75 3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 12 /PB5))
+    (pad 24 smd oval (at 1.25 3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 13 /PB6))
+    (pad 25 smd oval (at 1.75 3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 14 /PB7))
+    (pad 26 smd oval (at 2.25 3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (pad 27 smd oval (at 2.75 3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 28 smd oval (at 3.25 3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (pad 29 smd oval (at 3.9 3.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 42 "Net-(IC1-Pad29)"))
+    (pad 30 smd oval (at 3.9 2.75 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 34 /CLK))
+    (pad 31 smd oval (at 3.9 2.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 43 "Net-(IC1-Pad31)"))
+    (pad 32 smd oval (at 3.9 1.75 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 33 smd oval (at 3.9 1.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 44 "Net-(IC1-Pad33)"))
+    (pad 34 smd oval (at 3.9 0.75 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 32 /PA1))
+    (pad 35 smd oval (at 3.9 0.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 45 "Net-(IC1-Pad35)"))
+    (pad 36 smd oval (at 3.9 -0.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 46 "Net-(IC1-Pad36)"))
+    (pad 37 smd oval (at 3.9 -0.75 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 47 "Net-(IC1-Pad37)"))
+    (pad 38 smd oval (at 3.9 -1.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 48 "Net-(IC1-Pad38)"))
+    (pad 39 smd oval (at 3.9 -1.75 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 49 "Net-(IC1-Pad39)"))
+    (pad 40 smd oval (at 3.9 -2.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 50 "Net-(IC1-Pad40)"))
+    (pad 41 smd oval (at 3.9 -2.75 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (pad 42 smd oval (at 3.9 -3.25 90) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 15 /~RESET))
+    (pad 43 smd oval (at 3.25 -3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 44 smd oval (at 2.75 -3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 16 /WAKEUP))
+    (pad 45 smd oval (at 2.25 -3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 51 "Net-(IC1-Pad45)"))
+    (pad 46 smd oval (at 1.75 -3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 52 "Net-(IC1-Pad46)"))
+    (pad 47 smd oval (at 1.25 -3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 53 "Net-(IC1-Pad47)"))
+    (pad 48 smd oval (at 0.75 -3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 54 "Net-(IC1-Pad48)"))
+    (pad 51 smd oval (at -0.75 -3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 55 "Net-(IC1-Pad51)"))
+    (pad 52 smd oval (at -1.25 -3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 56 "Net-(IC1-Pad52)"))
+    (pad 53 smd oval (at -1.75 -3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (pad 54 smd oval (at -2.25 -3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 57 "Net-(IC1-Pad54)"))
+    (pad 55 smd oval (at -2.75 -3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 1 +3V3))
+    (pad 56 smd oval (at -3.25 -3.9 180) (size 0.7 0.25) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND))
+    (pad 57 smd rect (at 2.41875 2.41875 90) (size 1.6125 1.6125) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND) (solder_paste_margin_ratio -0.2))
+    (pad 57 smd rect (at 2.41875 0.80625 90) (size 1.6125 1.6125) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND) (solder_paste_margin_ratio -0.2))
+    (pad 57 smd rect (at 2.41875 -0.80625 90) (size 1.6125 1.6125) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND) (solder_paste_margin_ratio -0.2))
+    (pad 57 smd rect (at 2.41875 -2.41875 90) (size 1.6125 1.6125) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND) (solder_paste_margin_ratio -0.2))
+    (pad 57 smd rect (at 0.80625 2.41875 90) (size 1.6125 1.6125) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND) (solder_paste_margin_ratio -0.2))
+    (pad 57 smd rect (at 0.80625 0.80625 90) (size 1.6125 1.6125) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND) (solder_paste_margin_ratio -0.2))
+    (pad 57 smd rect (at 0.80625 -0.80625 90) (size 1.6125 1.6125) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND) (solder_paste_margin_ratio -0.2))
+    (pad 57 smd rect (at 0.80625 -2.41875 90) (size 1.6125 1.6125) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND) (solder_paste_margin_ratio -0.2))
+    (pad 57 smd rect (at -0.80625 2.41875 90) (size 1.6125 1.6125) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND) (solder_paste_margin_ratio -0.2))
+    (pad 57 smd rect (at -0.80625 0.80625 90) (size 1.6125 1.6125) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND) (solder_paste_margin_ratio -0.2))
+    (pad 57 smd rect (at -0.80625 -0.80625 90) (size 1.6125 1.6125) (layers F.Cu F.Paste F.Mask)
+      (net 2 GND) (solder_paste_margin_ratio -0.2))
+    (pad 57 smd rect (at -0.80625 -2.41875 90) (size 1.6125 1.6125) (layers F.Cu F.Paste F.Mask)
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diff --git a/hardware/fx2grok-flat/0.3/fx2grok-flat.pro b/hardware/fx2grok-flat/0.3/fx2grok-flat.pro
new file mode 100644 (file)
index 0000000..dc92020
--- /dev/null
+++ b/hardware/fx2grok-flat/0.3/fx2grok-flat.pro
@@ -0,0 +1,30 @@
+update=Thu 12 Apr 2018 05:40:54 PM PDT
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+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[general]
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+[eeschema]
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diff --git a/hardware/fx2grok-flat/0.3/fx2grok-flat.sch b/hardware/fx2grok-flat/0.3/fx2grok-flat.sch
new file mode 100644 (file)
index 0000000..60cb2db
--- /dev/null
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+EESchema Schematic File Version 4
+LIBS:fx2grok-flat-cache
+EELAYER 26 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title "FX2Grok Flat"
+Date ""
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+Comment1 "CC-BY-SA V4.0"
+Comment2 "(C) 2017 1BitSquared <info@1bitsquared.com>"
+Comment3 "(C) 2017 Piotr Esden-tempski <piotr@esden.net>"
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+F 2 "pkl_dipol:R_0402" H 3450 4900 60  0001 C CNN
+F 3 "" H 3450 4900 60  0000 C CNN
+F 4 "res-0402-100k" H 3450 4900 60  0001 C CNN "Key"
+F 5 "ANY" H 3450 4900 60  0001 C CNN "Source"
+       1    3450 4900
+       -1   0    0    1   
+$EndComp
+$Comp
+L power:+3V3 #PWR03
+U 1 1 59BC8347
+P 3200 4700
+F 0 "#PWR03" H 3200 4550 50  0001 C CNN
+F 1 "+3V3" H 3200 4840 50  0000 C CNN
+F 2 "" H 3200 4700 50  0001 C CNN
+F 3 "" H 3200 4700 50  0001 C CNN
+       1    3200 4700
+       1    0    0    -1  
+$EndComp
+Wire Wire Line
+       3550 5600 3550 5700
+$Comp
+L power:GND #PWR04
+U 1 1 59BC85CE
+P 3550 5700
+F 0 "#PWR04" H 3550 5450 50  0001 C CNN
+F 1 "GND" H 3550 5550 50  0000 C CNN
+F 2 "" H 3550 5700 50  0001 C CNN
+F 3 "" H 3550 5700 50  0001 C CNN
+       1    3550 5700
+       1    0    0    -1  
+$EndComp
+Wire Wire Line
+       4000 5500 3900 5500
+Wire Wire Line
+       3900 5500 3900 6200
+$Comp
+L power:GND #PWR05
+U 1 1 59BC8756
+P 3900 6200
+F 0 "#PWR05" H 3900 5950 50  0001 C CNN
+F 1 "GND" H 3900 6050 50  0000 C CNN
+F 2 "" H 3900 6200 50  0001 C CNN
+F 3 "" H 3900 6200 50  0001 C CNN
+       1    3900 6200
+       1    0    0    -1  
+$EndComp
+Text Notes 4000 6200 0    60   ~ 0
+RESERVED\nmust be tied\nto GND
+Wire Wire Line
+       4900 6000 4900 6100
+Wire Wire Line
+       4900 6100 5000 6100
+Wire Wire Line
+       5700 6100 5700 6000
+Wire Wire Line
+       5600 6000 5600 6100
+Connection ~ 5600 6100
+Wire Wire Line
+       5400 6000 5400 6100
+Connection ~ 5400 6100
+Wire Wire Line
+       5300 6000 5300 6100
+Connection ~ 5300 6100
+Wire Wire Line
+       5200 6000 5200 6100
+Connection ~ 5200 6100
+Wire Wire Line
+       5100 6000 5100 6100
+Connection ~ 5100 6100
+Wire Wire Line
+       5000 6000 5000 6100
+Connection ~ 5000 6100
+$Comp
+L power:GND #PWR06
+U 1 1 59BC8A76
+P 5300 6200
+F 0 "#PWR06" H 5300 5950 50  0001 C CNN
+F 1 "GND" H 5300 6050 50  0000 C CNN
+F 2 "" H 5300 6200 50  0001 C CNN
+F 3 "" H 5300 6200 50  0001 C CNN
+       1    5300 6200
+       1    0    0    -1  
+$EndComp
+$Comp
+L pkl_device:pkl_LED D1
+U 1 1 59BC9087
+P 10700 800
+F 0 "D1" H 10700 1020 50  0000 C CNN
+F 1 "GRN" H 10700 927 50  0000 C CNN
+F 2 "pkl_dipol:D_0603" H 10700 800 60  0001 C CNN
+F 3 "" H 10700 800 60  0000 C CNN
+F 4 "led-0603-grn" H 10700 800 60  0001 C CNN "Key"
+F 5 "ANY" H 10700 800 60  0001 C CNN "Source"
+       1    10700 800 
+       -1   0    0    -1  
+$EndComp
+$Comp
+L pkl_device:pkl_R_Small R1
+U 1 1 59BC91D9
+P 10100 800
+F 0 "R1" V 10050 900 50  0000 L CNN
+F 1 "2k7" V 10050 700 50  0000 R CNN
+F 2 "pkl_dipol:R_0402" H 10100 800 60  0001 C CNN
+F 3 "" H 10100 800 60  0000 C CNN
+F 4 "res-0402-2k7" H 10100 800 60  0001 C CNN "Key"
+F 5 "ANY" H 10100 800 60  0001 C CNN "Source"
+       1    10100 800 
+       0    1    1    0   
+$EndComp
+Wire Wire Line
+       10200 800  10500 800 
+Wire Wire Line
+       10900 800  11000 800 
+Wire Wire Line
+       11000 800  11000 700 
+Wire Wire Line
+       1600 1000 1600 900 
+$Comp
+L power:+5V #PWR08
+U 1 1 59BC9861
+P 1600 900
+F 0 "#PWR08" H 1600 750 50  0001 C CNN
+F 1 "+5V" H 1600 1040 50  0000 C CNN
+F 2 "" H 1600 900 50  0001 C CNN
+F 3 "" H 1600 900 50  0001 C CNN
+       1    1600 900 
+       1    0    0    -1  
+$EndComp
+NoConn ~ 1500 1300
+Wire Wire Line
+       1500 1100 2200 1100
+Wire Wire Line
+       1500 1200 2000 1200
+Wire Wire Line
+       1500 1400 1700 1400
+Wire Wire Line
+       1700 1400 1700 1800
+Wire Wire Line
+       1000 1800 1400 1800
+Wire Wire Line
+       1400 1800 1400 1900
+Connection ~ 1400 1800
+$Comp
+L power:GND #PWR09
+U 1 1 59BC9A8B
+P 1400 1900
+F 0 "#PWR09" H 1400 1650 50  0001 C CNN
+F 1 "GND" H 1400 1750 50  0000 C CNN
+F 2 "" H 1400 1900 50  0001 C CNN
+F 3 "" H 1400 1900 50  0001 C CNN
+       1    1400 1900
+       1    0    0    -1  
+$EndComp
+Text Label 3400 1100 0    60   ~ 0
+USBD_N
+Text Label 3400 1300 0    60   ~ 0
+USBD_P
+$Comp
+L pkl_device:pkl_VREG_5PIN_FIXED U1
+U 1 1 59BCA11B
+P 1300 2800
+F 0 "U1" H 1150 2600 60  0000 C CNN
+F 1 "3.3V" H 1300 3000 60  0000 C CNN
+F 2 "pkl_housings_sot:SOT-23-5" H 1300 2800 60  0001 C CNN
+F 3 "" H 1300 2800 60  0000 C CNN
+F 4 "vreg-sot23-5-3v3" H 1300 2800 60  0001 C CNN "Key"
+F 5 "ANY" H 1300 2800 60  0001 C CNN "Source"
+       1    1300 2800
+       1    0    0    -1  
+$EndComp
+Wire Wire Line
+       700  2700 800  2700
+Wire Wire Line
+       1500 1000 1600 1000
+$Comp
+L pkl_device:pkl_C C11
+U 1 1 59BCB8FF
+P 700 3200
+F 0 "C11" H 725 3300 50  0000 L CNN
+F 1 "4u7" H 725 3100 50  0000 L CNN
+F 2 "pkl_dipol:C_0603" H 738 3050 30  0001 C CNN
+F 3 "" H 700 3200 60  0000 C CNN
+F 4 "cap-cer-0603-4u7" H 700 3200 60  0001 C CNN "Key"
+F 5 "ANY" H 700 3200 60  0001 C CNN "Source"
+       1    700  3200
+       1    0    0    -1  
+$EndComp
+$Comp
+L pkl_device:pkl_C_Small C12
+U 1 1 59BCBABD
+P 900 3200
+F 0 "C12" H 910 3270 50  0000 L CNN
+F 1 "10n" H 910 3120 50  0000 L CNN
+F 2 "pkl_dipol:C_0402" H 900 3200 60  0001 C CNN
+F 3 "" H 900 3200 60  0000 C CNN
+F 4 "cap-cer-0402-10n" H 900 3200 60  0001 C CNN "Key"
+F 5 "ANY" H 900 3200 60  0001 C CNN "Source"
+       1    900  3200
+       1    0    0    -1  
+$EndComp
+Wire Wire Line
+       1000 2800 900  2800
+Wire Wire Line
+       900  2800 900  3100
+Wire Wire Line
+       700  2700 700  3100
+Wire Wire Line
+       700  3300 700  3400
+Wire Wire Line
+       700  3400 800  3400
+Wire Wire Line
+       900  3400 900  3300
+Wire Wire Line
+       800  3400 800  3500
+Connection ~ 800  3400
+$Comp
+L power:GND #PWR010
+U 1 1 59BCBE6F
+P 800 3500
+F 0 "#PWR010" H 800 3250 50  0001 C CNN
+F 1 "GND" H 800 3350 50  0000 C CNN
+F 2 "" H 800 3500 50  0001 C CNN
+F 3 "" H 800 3500 50  0001 C CNN
+       1    800  3500
+       1    0    0    -1  
+$EndComp
+$Comp
+L pkl_device:pkl_C C13
+U 1 1 59BCBE9F
+P 1900 3200
+F 0 "C13" H 1925 3300 50  0000 L CNN
+F 1 "4u7" H 1925 3100 50  0000 L CNN
+F 2 "pkl_dipol:C_0603" H 1938 3050 30  0001 C CNN
+F 3 "" H 1900 3200 60  0000 C CNN
+F 4 "cap-cer-0603-4u7" H 1900 3200 60  0001 C CNN "Key"
+F 5 "ANY" H 1900 3200 60  0001 C CNN "Source"
+       1    1900 3200
+       1    0    0    -1  
+$EndComp
+Wire Wire Line
+       1600 2900 1700 2900
+Wire Wire Line
+       1700 2900 1700 3400
+$Comp
+L power:GND #PWR011
+U 1 1 59BCBF80
+P 1800 3500
+F 0 "#PWR011" H 1800 3250 50  0001 C CNN
+F 1 "GND" H 1800 3350 50  0000 C CNN
+F 2 "" H 1800 3500 50  0001 C CNN
+F 3 "" H 1800 3500 50  0001 C CNN
+       1    1800 3500
+       1    0    0    -1  
+$EndComp
+Wire Wire Line
+       1600 2700 1700 2700
+Wire Wire Line
+       1900 2700 1900 3100
+Wire Wire Line
+       1900 3400 1900 3300
+Wire Wire Line
+       1700 3400 1800 3400
+Wire Wire Line
+       1800 3400 1800 3500
+Connection ~ 1800 3400
+Wire Wire Line
+       900  2700 900  2600
+Connection ~ 900  2700
+Wire Wire Line
+       1700 2700 1700 2600
+Connection ~ 1700 2700
+$Comp
+L power:+5V #PWR012
+U 1 1 59BCC3AB
+P 900 2600
+F 0 "#PWR012" H 900 2450 50  0001 C CNN
+F 1 "+5V" H 900 2740 50  0000 C CNN
+F 2 "" H 900 2600 50  0001 C CNN
+F 3 "" H 900 2600 50  0001 C CNN
+       1    900  2600
+       1    0    0    -1  
+$EndComp
+$Comp
+L power:+3V3 #PWR013
+U 1 1 59BCC3DD
+P 1700 2600
+F 0 "#PWR013" H 1700 2450 50  0001 C CNN
+F 1 "+3V3" H 1700 2740 50  0000 C CNN
+F 2 "" H 1700 2600 50  0001 C CNN
+F 3 "" H 1700 2600 50  0001 C CNN
+       1    1700 2600
+       1    0    0    -1  
+$EndComp
+Wire Wire Line
+       1000 2900 800  2900
+Wire Wire Line
+       800  2900 800  2700
+Connection ~ 800  2700
+$Comp
+L pkl_device:pkl_C_Small C1
+U 1 1 59BCD014
+P 4000 1400
+F 0 "C1" H 4010 1470 50  0000 L CNN
+F 1 "100n" H 4010 1320 50  0000 L CNN
+F 2 "pkl_dipol:C_0402" H 4000 1400 60  0001 C CNN
+F 3 "" H 4000 1400 60  0000 C CNN
+F 4 "cap-cer-0402-100n" H 4000 1400 60  0001 C CNN "Key"
+F 5 "ANY" H 4000 1400 60  0001 C CNN "Source"
+       1    4000 1400
+       1    0    0    -1  
+$EndComp
+$Comp
+L pkl_device:pkl_C_Small C2
+U 1 1 59BCD4ED
+P 4200 1400
+F 0 "C2" H 4210 1470 50  0000 L CNN
+F 1 "100n" H 4210 1320 50  0000 L CNN
+F 2 "pkl_dipol:C_0402" H 4200 1400 60  0001 C CNN
+F 3 "" H 4200 1400 60  0000 C CNN
+F 4 "cap-cer-0402-100n" H 4200 1400 60  0001 C CNN "Key"
+F 5 "ANY" H 4200 1400 60  0001 C CNN "Source"
+       1    4200 1400
+       1    0    0    -1  
+$EndComp
+$Comp
+L pkl_device:pkl_C_Small C3
+U 1 1 59BCD52C
+P 4400 1400
+F 0 "C3" H 4410 1470 50  0000 L CNN
+F 1 "100n" H 4410 1320 50  0000 L CNN
+F 2 "pkl_dipol:C_0402" H 4400 1400 60  0001 C CNN
+F 3 "" H 4400 1400 60  0000 C CNN
+F 4 "cap-cer-0402-100n" H 4400 1400 60  0001 C CNN "Key"
+F 5 "ANY" H 4400 1400 60  0001 C CNN "Source"
+       1    4400 1400
+       1    0    0    -1  
+$EndComp
+$Comp
+L pkl_device:pkl_C_Small C4
+U 1 1 59BCD572
+P 4600 1400
+F 0 "C4" H 4610 1470 50  0000 L CNN
+F 1 "100n" H 4610 1320 50  0000 L CNN
+F 2 "pkl_dipol:C_0402" H 4600 1400 60  0001 C CNN
+F 3 "" H 4600 1400 60  0000 C CNN
+F 4 "cap-cer-0402-100n" H 4600 1400 60  0001 C CNN "Key"
+F 5 "ANY" H 4600 1400 60  0001 C CNN "Source"
+       1    4600 1400
+       1    0    0    -1  
+$EndComp
+$Comp
+L pkl_device:pkl_C_Small C5
+U 1 1 59BCD5BB
+P 4800 1400
+F 0 "C5" H 4810 1470 50  0000 L CNN
+F 1 "100n" H 4810 1320 50  0000 L CNN
+F 2 "pkl_dipol:C_0402" H 4800 1400 60  0001 C CNN
+F 3 "" H 4800 1400 60  0000 C CNN
+F 4 "cap-cer-0402-100n" H 4800 1400 60  0001 C CNN "Key"
+F 5 "ANY" H 4800 1400 60  0001 C CNN "Source"
+       1    4800 1400
+       1    0    0    -1  
+$EndComp
+$Comp
+L pkl_device:pkl_C_Small C6
+U 1 1 59BCD603
+P 5000 1400
+F 0 "C6" H 5010 1470 50  0000 L CNN
+F 1 "100n" H 5010 1320 50  0000 L CNN
+F 2 "pkl_dipol:C_0402" H 5000 1400 60  0001 C CNN
+F 3 "" H 5000 1400 60  0000 C CNN
+F 4 "cap-cer-0402-100n" H 5000 1400 60  0001 C CNN "Key"
+F 5 "ANY" H 5000 1400 60  0001 C CNN "Source"
+       1    5000 1400
+       1    0    0    -1  
+$EndComp
+Wire Wire Line
+       4000 1300 4000 1200
+Wire Wire Line
+       4000 1200 4200 1200
+Wire Wire Line
+       5000 1200 5000 1300
+Wire Wire Line
+       4800 1300 4800 1200
+Connection ~ 4800 1200
+Wire Wire Line
+       4600 1300 4600 1200
+Connection ~ 4600 1200
+Wire Wire Line
+       4400 1300 4400 1200
+Connection ~ 4400 1200
+Wire Wire Line
+       4200 1300 4200 1200
+Connection ~ 4200 1200
+Wire Wire Line
+       4000 1500 4000 1600
+Wire Wire Line
+       4000 1600 4200 1600
+Wire Wire Line
+       5000 1600 5000 1500
+Wire Wire Line
+       4200 1500 4200 1600
+Connection ~ 4200 1600
+Wire Wire Line
+       4400 1500 4400 1600
+Connection ~ 4400 1600
+Wire Wire Line
+       4600 1500 4600 1600
+Connection ~ 4600 1600
+Wire Wire Line
+       4800 1500 4800 1600
+Connection ~ 4800 1600
+Wire Wire Line
+       4500 1200 4500 1100
+Connection ~ 4500 1200
+$Comp
+L power:+3V3 #PWR014
+U 1 1 59BCDBFB
+P 4500 1100
+F 0 "#PWR014" H 4500 950 50  0001 C CNN
+F 1 "+3V3" H 4500 1240 50  0000 C CNN
+F 2 "" H 4500 1100 50  0001 C CNN
+F 3 "" H 4500 1100 50  0001 C CNN
+       1    4500 1100
+       1    0    0    -1  
+$EndComp
+Wire Wire Line
+       4500 1600 4500 1700
+Connection ~ 4500 1600
+$Comp
+L power:GND #PWR015
+U 1 1 59BCDECB
+P 4500 1700
+F 0 "#PWR015" H 4500 1450 50  0001 C CNN
+F 1 "GND" H 4500 1550 50  0000 C CNN
+F 2 "" H 4500 1700 50  0001 C CNN
+F 3 "" H 4500 1700 50  0001 C CNN
+       1    4500 1700
+       1    0    0    -1  
+$EndComp
+Text Notes 4050 2100 0    60   ~ 0
+100n bypass caps\nfor all VCC pins
+$Comp
+L pkl_device:pkl_C_Small C9
+U 1 1 59BCE21C
+P 5800 1400
+F 0 "C9" H 5810 1470 50  0000 L CNN
+F 1 "100n" H 5810 1320 50  0000 L CNN
+F 2 "pkl_dipol:C_0402" H 5800 1400 60  0001 C CNN
+F 3 "" H 5800 1400 60  0000 C CNN
+F 4 "cap-cer-0402-100n" H 5800 1400 60  0001 C CNN "Key"
+F 5 "ANY" H 5800 1400 60  0001 C CNN "Source"
+       1    5800 1400
+       1    0    0    -1  
+$EndComp
+$Comp
+L pkl_device:pkl_C_Small C10
+U 1 1 59BCE282
+P 6000 1400
+F 0 "C10" H 6010 1470 50  0000 L CNN
+F 1 "100n" H 6010 1320 50  0000 L CNN
+F 2 "pkl_dipol:C_0402" H 6000 1400 60  0001 C CNN
+F 3 "" H 6000 1400 60  0000 C CNN
+F 4 "cap-cer-0402-100n" H 6000 1400 60  0001 C CNN "Key"
+F 5 "ANY" H 6000 1400 60  0001 C CNN "Source"
+       1    6000 1400
+       1    0    0    -1  
+$EndComp
+$Comp
+L pkl_device:pkl_C_Small C8
+U 1 1 59BCE2D7
+P 5600 1400
+F 0 "C8" H 5610 1470 50  0000 L CNN
+F 1 "2u2" H 5610 1320 50  0000 L CNN
+F 2 "pkl_dipol:C_0402" H 5600 1400 60  0001 C CNN
+F 3 "" H 5600 1400 60  0000 C CNN
+F 4 "cap-cer-0402-2u2" H 5600 1400 60  0001 C CNN "Key"
+F 5 "ANY" H 5600 1400 60  0001 C CNN "Source"
+       1    5600 1400
+       1    0    0    -1  
+$EndComp
+$Comp
+L pkl_device:pkl_C_Small C7
+U 1 1 59BCE337
+P 5400 1400
+F 0 "C7" H 5410 1470 50  0000 L CNN
+F 1 "2u2" H 5410 1320 50  0000 L CNN
+F 2 "pkl_dipol:C_0402" H 5400 1400 60  0001 C CNN
+F 3 "" H 5400 1400 60  0000 C CNN
+F 4 "cap-cer-0402-2u2" H 5400 1400 60  0001 C CNN "Key"
+F 5 "ANY" H 5400 1400 60  0001 C CNN "Source"
+       1    5400 1400
+       1    0    0    -1  
+$EndComp
+Wire Wire Line
+       5400 1300 5400 1200
+Wire Wire Line
+       5400 1200 5600 1200
+Wire Wire Line
+       6000 1200 6000 1300
+Wire Wire Line
+       5800 1300 5800 1200
+Connection ~ 5800 1200
+Wire Wire Line
+       5600 1300 5600 1200
+Connection ~ 5600 1200
+Wire Wire Line
+       5400 1500 5400 1600
+Wire Wire Line
+       5400 1600 5600 1600
+Wire Wire Line
+       6000 1600 6000 1500
+Wire Wire Line
+       5800 1500 5800 1600
+Connection ~ 5800 1600
+Wire Wire Line
+       5600 1500 5600 1600
+Connection ~ 5600 1600
+Wire Wire Line
+       5700 1600 5700 1700
+Connection ~ 5700 1600
+Wire Wire Line
+       5700 1200 5700 1100
+Connection ~ 5700 1200
+$Comp
+L power:+3V3 #PWR016
+U 1 1 59BCE98D
+P 5700 1100
+F 0 "#PWR016" H 5700 950 50  0001 C CNN
+F 1 "+3V3" H 5700 1240 50  0000 C CNN
+F 2 "" H 5700 1100 50  0001 C CNN
+F 3 "" H 5700 1100 50  0001 C CNN
+       1    5700 1100
+       1    0    0    -1  
+$EndComp
+$Comp
+L power:GND #PWR017
+U 1 1 59BCE9DD
+P 5700 1700
+F 0 "#PWR017" H 5700 1450 50  0001 C CNN
+F 1 "GND" H 5700 1550 50  0000 C CNN
+F 2 "" H 5700 1700 50  0001 C CNN
+F 3 "" H 5700 1700 50  0001 C CNN
+       1    5700 1700
+       1    0    0    -1  
+$EndComp
+Text Notes 5400 2100 0    60   ~ 0
+2u2/100n bypass caps\nfor all AVCC pins
+$Comp
+L pkl_device:pkl_XTAL_XGXG X1
+U 1 1 59BCF405
+P 1500 4500
+F 0 "X1" H 1600 4600 50  0000 C CNN
+F 1 "24MHz" H 1550 4400 50  0000 L CNN
+F 2 "pkl_misc:ABM8" H 1500 4500 60  0001 C CNN
+F 3 "" H 1500 4500 60  0000 C CNN
+F 4 "xtal-abm8-24mhz" H 1500 4500 60  0001 C CNN "Key"
+F 5 "ANY" H 1500 4500 60  0001 C CNN "Source"
+       1    1500 4500
+       1    0    0    -1  
+$EndComp
+Wire Wire Line
+       1500 4600 1500 4700
+$Comp
+L power:GND #PWR018
+U 1 1 59BCF789
+P 1500 4700
+F 0 "#PWR018" H 1500 4450 50  0001 C CNN
+F 1 "GND" H 1500 4550 50  0000 C CNN
+F 2 "" H 1500 4700 50  0001 C CNN
+F 3 "" H 1500 4700 50  0001 C CNN
+       1    1500 4700
+       1    0    0    -1  
+$EndComp
+Wire Wire Line
+       1500 4400 1500 4000
+Wire Wire Line
+       1500 4000 1700 4000
+Wire Wire Line
+       1700 4000 1700 4100
+$Comp
+L power:GND #PWR019
+U 1 1 59BCF8B6
+P 1700 4100
+F 0 "#PWR019" H 1700 3850 50  0001 C CNN
+F 1 "GND" H 1700 3950 50  0000 C CNN
+F 2 "" H 1700 4100 50  0001 C CNN
+F 3 "" H 1700 4100 50  0001 C CNN
+       1    1700 4100
+       1    0    0    -1  
+$EndComp
+$Comp
+L power:GND #PWR020
+U 1 1 59BCF909
+P 1700 4100
+F 0 "#PWR020" H 1700 3850 50  0001 C CNN
+F 1 "GND" H 1700 3950 50  0000 C CNN
+F 2 "" H 1700 4100 50  0001 C CNN
+F 3 "" H 1700 4100 50  0001 C CNN
+       1    1700 4100
+       1    0    0    -1  
+$EndComp
+Wire Wire Line
+       1600 4500 1900 4500
+Wire Wire Line
+       1000 4500 1100 4500
+Wire Wire Line
+       1900 4500 1900 4600
+Connection ~ 1900 4500
+Wire Wire Line
+       1100 4500 1100 4600
+Connection ~ 1100 4500
+$Comp
+L pkl_device:pkl_C_Small C16
+U 1 1 59BCFF16
+P 1900 4700
+F 0 "C16" H 1910 4770 50  0000 L CNN
+F 1 "10p" H 1910 4620 50  0000 L CNN
+F 2 "pkl_dipol:C_0402" H 1900 4700 60  0001 C CNN
+F 3 "" H 1900 4700 60  0000 C CNN
+F 4 "cap-cer-0402-10p" H 1900 4700 60  0001 C CNN "Key"
+F 5 "ANY" H 1900 4700 60  0001 C CNN "Source"
+       1    1900 4700
+       1    0    0    -1  
+$EndComp
+$Comp
+L pkl_device:pkl_C_Small C15
+U 1 1 59BCFFAD
+P 1100 4700
+F 0 "C15" H 1110 4770 50  0000 L CNN
+F 1 "10p" H 1110 4620 50  0000 L CNN
+F 2 "pkl_dipol:C_0402" H 1100 4700 60  0001 C CNN
+F 3 "" H 1100 4700 60  0000 C CNN
+F 4 "cap-cer-0402-10p" H 1100 4700 60  0001 C CNN "Key"
+F 5 "ANY" H 1100 4700 60  0001 C CNN "Source"
+       1    1100 4700
+       1    0    0    -1  
+$EndComp
+Wire Wire Line
+       1100 4800 1100 4900
+Wire Wire Line
+       1900 4800 1900 4900
+$Comp
+L power:GND #PWR021
+U 1 1 59BD031F
+P 1100 4900
+F 0 "#PWR021" H 1100 4650 50  0001 C CNN
+F 1 "GND" H 1100 4750 50  0000 C CNN
+F 2 "" H 1100 4900 50  0001 C CNN
+F 3 "" H 1100 4900 50  0001 C CNN
+       1    1100 4900
+       1    0    0    -1  
+$EndComp
+$Comp
+L power:GND #PWR022
+U 1 1 59BD0378
+P 1900 4900
+F 0 "#PWR022" H 1900 4650 50  0001 C CNN
+F 1 "GND" H 1900 4750 50  0000 C CNN
+F 2 "" H 1900 4900 50  0001 C CNN
+F 3 "" H 1900 4900 50  0001 C CNN
+       1    1900 4900
+       1    0    0    -1  
+$EndComp
+Text Label 1000 4500 2    60   ~ 0
+XTALOUT
+Text Label 2000 4500 0    60   ~ 0
+XTALIN
+$Comp
+L Connector_Generic:Conn_02x07_Odd_Even J1
+U 1 1 59BD0AF3
+P 10300 3500
+F 0 "J1" H 10350 3900 50  0000 C CNN
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diff --git a/hardware/fx2grok-flat/0.3/sym-lib-table b/hardware/fx2grok-flat/0.3/sym-lib-table
new file mode 100644 (file)
index 0000000..f5d0a11
--- /dev/null
+++ b/hardware/fx2grok-flat/0.3/sym-lib-table
@@ -0,0 +1,19 @@
+(sym_lib_table
+  (lib (name 74xx)(type Legacy)(uri ${KICAD_SYMBOL_DIR}/74xx.lib)(options "")(descr ""))
+  (lib (name pkl_conn)(type Legacy)(uri /home/esdentem/projects/sigrok/fx2grok-git/lib/pkl/pkl_conn.lib)(options "")(descr ""))
+  (lib (name pkl_cypress)(type Legacy)(uri /home/esdentem/projects/sigrok/fx2grok-git/lib/pkl/pkl_cypress.lib)(options "")(descr ""))
+  (lib (name pkl_device)(type Legacy)(uri /home/esdentem/projects/sigrok/fx2grok-git/lib/pkl/pkl_device.lib)(options "")(descr ""))
+  (lib (name pkl_ftdi)(type Legacy)(uri /home/esdentem/projects/sigrok/fx2grok-git/lib/pkl/pkl_ftdi.lib)(options "")(descr ""))
+  (lib (name pkl_lattice)(type Legacy)(uri /home/esdentem/projects/sigrok/fx2grok-git/lib/pkl/pkl_lattice.lib)(options "")(descr ""))
+  (lib (name pkl_linear)(type Legacy)(uri /home/esdentem/projects/sigrok/fx2grok-git/lib/pkl/pkl_linear.lib)(options "")(descr ""))
+  (lib (name pkl_logos)(type Legacy)(uri /home/esdentem/projects/sigrok/fx2grok-git/lib/pkl/pkl_logos.lib)(options "")(descr ""))
+  (lib (name pkl_maxim)(type Legacy)(uri /home/esdentem/projects/sigrok/fx2grok-git/lib/pkl/pkl_maxim.lib)(options "")(descr ""))
+  (lib (name pkl_memory)(type Legacy)(uri /home/esdentem/projects/sigrok/fx2grok-git/lib/pkl/pkl_memory.lib)(options "")(descr ""))
+  (lib (name pkl_misc)(type Legacy)(uri /home/esdentem/projects/sigrok/fx2grok-git/lib/pkl/pkl_misc.lib)(options "")(descr ""))
+  (lib (name pkl_molex)(type Legacy)(uri /home/esdentem/projects/sigrok/fx2grok-git/lib/pkl/pkl_molex.lib)(options "")(descr ""))
+  (lib (name pkl_power)(type Legacy)(uri /home/esdentem/projects/sigrok/fx2grok-git/lib/pkl/pkl_power.lib)(options "")(descr ""))
+  (lib (name pkl_sensor)(type Legacy)(uri /home/esdentem/projects/sigrok/fx2grok-git/lib/pkl/pkl_sensor.lib)(options "")(descr ""))
+  (lib (name pkl_silabs)(type Legacy)(uri /home/esdentem/projects/sigrok/fx2grok-git/lib/pkl/pkl_silabs.lib)(options "")(descr ""))
+  (lib (name pkl_tag_connect)(type Legacy)(uri /home/esdentem/projects/sigrok/fx2grok-git/lib/pkl/pkl_tag_connect.lib)(options "")(descr ""))
+  (lib (name pkl_texas)(type Legacy)(uri /home/esdentem/projects/sigrok/fx2grok-git/lib/pkl/pkl_texas.lib)(options "")(descr ""))
+)