Rewrote the trigger config. Added trigger position and trigger slope

diff --git a/hardware/link-mso19/api.c b/hardware/link-mso19/api.c
index 9e599c61efbf88c906b7cbbf42cf773c7c406733..3534ef609c0abdd2ea46b300cf9856a2f4601509 100644 (file)
--- a/hardware/link-mso19/api.c
+++ b/hardware/link-mso19/api.c
@@ -22,6 +22,8 @@
 static const int hwcaps[] = {
        SR_HWCAP_LOGIC_ANALYZER,
        SR_HWCAP_SAMPLERATE,
+  SR_HWCAP_TRIGGER_SLOPE, 
+  SR_HWCAP_HORIZ_TRIGGERPOS,
 //     SR_HWCAP_CAPTURE_RATIO,
        SR_HWCAP_LIMIT_SAMPLES,
 //     SR_HWCAP_RLE,
@@ -326,6 +328,9 @@ static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
 {
        int ret;
 
+       struct dev_context *devc;
+  devc = sdi->priv;
+
        if (sdi->status != SR_ST_ACTIVE)
                return SR_ERR;
 
@@ -340,6 +345,34 @@ static int hw_dev_config_set(const struct sr_dev_inst *sdi, int hwcap,
   case SR_HWCAP_CAPTURE_RATIO:
     ret = SR_OK;
                break;
+  case SR_HWCAP_TRIGGER_SLOPE:
+    {
+      uint64_t slope = *(const uint64_t *)value;
+      if (slope != SLOPE_NEGATIVE && slope != SLOPE_POSITIVE)
+      {
+        sr_err("Invalid trigger slope");
+        ret = SR_ERR_ARG;
+      } else {
+        devc->trigger_slope = slope;
+        ret = SR_OK;
+      }
+    }
+    break;
+  case SR_HWCAP_HORIZ_TRIGGERPOS:
+    {
+      float pos = *(const float *)value;
+      if (pos < 0 || pos > 255) {
+        sr_err("Trigger position (%f) should be between 0 and 255.", pos);
+        ret = SR_ERR_ARG;
+      } else {
+        int trigger_pos = (int)pos;
+        printf("Set trigger posion to %X\n", trigger_pos&0xff);
+        devc->trigger_holdoff[0] = trigger_pos&0xff;
+        ret = SR_OK;
+      }
+    }
+    break;
+
        case SR_HWCAP_RLE:
     ret = SR_OK;
                break;
@@ -371,20 +404,6 @@ static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
                return SR_ERR;
        }
 
-       /*
-        * Enable/disable channel groups in the flag register according to the
-        * probe mask. Calculate this here, because num_channels is needed
-        * to limit readcount.
-        */
-       //changrp_mask = 0;
-       //num_channels = 0;
-       //for (i = 0; i < 4; i++) {
-       //      if (devc->probe_mask & (0xff << (i * 8))) {
-       //              changrp_mask |= (1 << i);
-       //              num_channels++;
-       //      }
-       //}
-
        /* FIXME: No need to do full reconfigure every time */
 //     ret = mso_reset_fsm(sdi);
 //     if (ret != SR_OK)
@@ -410,26 +429,17 @@ static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
        if (ret != SR_OK)
                return ret;
 
+
   printf("Configure trigger\n");
        ret = mso_configure_trigger(sdi);
        if (ret != SR_OK)
                return ret;
 
-       /* FIXME: trigger_position */
-
 
        /* END of config hardware part */
-
-       /* with trigger */
-  printf("arm\n");
-       ret = mso_arm(sdi);
-       if (ret != SR_OK)
-               return ret;
-
-       /* without trigger */
-//     ret = mso_force_capture(sdi);
-//     if (ret != SR_OK)
-//             return ret;
+  ret = mso_arm(sdi);
+  if (ret != SR_OK)
+    return ret;
 
        /* Start acquisition on the device. */
   printf("Check trigger\n");
@@ -471,7 +481,7 @@ static int hw_dev_acquisition_start(const struct sr_dev_inst *sdi,
        return SR_OK;
 }
 
-/* TODO: This stops acquisition on ALL devices, ignoring dev_index. */
+/* This stops acquisition on ALL devices, ignoring dev_index. */
 static int hw_dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data)
 {
        /* Avoid compiler warnings. */

diff --git a/hardware/link-mso19/protocol.c b/hardware/link-mso19/protocol.c
index f8936ae7f2dec969a36c60c8ea427b67eadd5839..b4dcfbf97cd0fde58fb15bb7f0046a4308004e1b 100644 (file)
--- a/hardware/link-mso19/protocol.c
+++ b/hardware/link-mso19/protocol.c
@@ -70,71 +70,73 @@ ret:
 SR_PRIV int mso_configure_trigger(struct sr_dev_inst *sdi)
 {
        struct dev_context *devc = sdi->priv;
-       uint16_t ops[16];
-       uint16_t dso_trigger = mso_calc_raw_from_mv(devc);
+       uint16_t threshold_value = mso_calc_raw_from_mv(devc);
 
-       dso_trigger &= 0x3ff;
-       if ((!devc->trigger_slope && devc->trigger_chan == 1) ||
-                       (devc->trigger_slope &&
-                        (devc->trigger_chan == 0 ||
-                         devc->trigger_chan == 2 ||
-                         devc->trigger_chan == 3)))
-               dso_trigger |= 0x400;
 
-       switch (devc->trigger_chan) {
-       case 1:
-               dso_trigger |= 0xe000;
-       case 2:
-               dso_trigger |= 0x4000;
-               break;
-       case 3:
-               dso_trigger |= 0x2000;
-               break;
-       case 4:
-               dso_trigger |= 0xa000;
-               break;
-       case 5:
-               dso_trigger |= 0x8000;
-               break;
-       default:
-       case 0:
-               break;
-       }
+  threshold_value = 0x153C;
+  uint8_t trigger_config = 0; 
+
+  if (devc->trigger_slope)
+    trigger_config |= 0x04; //Trigger on falling edge
 
        switch (devc->trigger_outsrc) {
        case 1:
-               dso_trigger |= 0x800;
+               trigger_config |= 0x00; //Trigger pulse output
                break;
        case 2:
-               dso_trigger |= 0x1000;
+               trigger_config |= 0x08; //PWM DAC from the pattern generator buffer
                break;
        case 3:
-               dso_trigger |= 0x1800;
+               trigger_config |= 0x18; //White noise
                break;
-
        }
 
-       ops[0] = mso_trans(5, devc->la_trigger);
-       ops[1] = mso_trans(6, devc->la_trigger_mask);
-       ops[2] = mso_trans(3, dso_trigger & 0xff);
-       ops[3] = mso_trans(4, (dso_trigger >> 8) & 0xff);
-       ops[4] = mso_trans(11,
+       switch (devc->trigger_chan) {
+    case 0:
+      trigger_config |= 0x00; //DSO level trigger //b00000000
+      break;
+    case 1:
+      trigger_config |= 0x20; //DSO level trigger & width < trigger_width
+      break;
+    case 2:
+      trigger_config |= 0x40; //DSO level trigger & width >= trigger_width 
+      break;
+    case 3:
+      trigger_config |= 0x60; //LA combination trigger
+      break;
+  }
+
+  //Last bit of trigger config reg 4 needs to be 1 for trigger enable,
+  //otherwise the trigger is not enabled
+  if (devc->use_trigger)
+    trigger_config |= 0x80;
+
+       uint16_t ops[18];
+       ops[0] = mso_trans(3, threshold_value & 0xff);
+  //The trigger_config also holds the 2 MSB bits from the threshold value
+       ops[1] = mso_trans(4, trigger_config | (threshold_value >> 8) & 0x03);
+       ops[2] = mso_trans(5, devc->la_trigger);
+       ops[3] = mso_trans(6, devc->la_trigger_mask);
+       ops[4] = mso_trans(7, devc->trigger_holdoff[0]);
+       ops[5] = mso_trans(8, devc->trigger_holdoff[1]);
+
+       ops[6] = mso_trans(11,
                        devc->dso_trigger_width / SR_HZ_TO_NS(devc->cur_rate));
 
        /* Select the SPI/I2C trigger config bank */
-       ops[5] = mso_trans(REG_CTL2, (devc->ctlbase2 | BITS_CTL2_BANK(2)));
+       ops[7] = mso_trans(REG_CTL2, (devc->ctlbase2 | BITS_CTL2_BANK(2)));
        /* Configure the SPI/I2C protocol trigger */
-       ops[6] = mso_trans(REG_PT_WORD(0), devc->protocol_trigger.word[0]);
-       ops[7] = mso_trans(REG_PT_WORD(1), devc->protocol_trigger.word[1]);
-       ops[8] = mso_trans(REG_PT_WORD(2), devc->protocol_trigger.word[2]);
-       ops[9] = mso_trans(REG_PT_WORD(3), devc->protocol_trigger.word[3]);
-       ops[10] = mso_trans(REG_PT_MASK(0), devc->protocol_trigger.mask[0]);
-       ops[11] = mso_trans(REG_PT_MASK(1), devc->protocol_trigger.mask[1]);
-       ops[12] = mso_trans(REG_PT_MASK(2), devc->protocol_trigger.mask[2]);
-       ops[13] = mso_trans(REG_PT_MASK(3), devc->protocol_trigger.mask[3]);
-       ops[14] = mso_trans(REG_PT_SPIMODE, devc->protocol_trigger.spimode);
+       ops[8] = mso_trans(REG_PT_WORD(0), devc->protocol_trigger.word[0]);
+       ops[9] = mso_trans(REG_PT_WORD(1), devc->protocol_trigger.word[1]);
+       ops[10] = mso_trans(REG_PT_WORD(2), devc->protocol_trigger.word[2]);
+       ops[11] = mso_trans(REG_PT_WORD(3), devc->protocol_trigger.word[3]);
+       ops[12] = mso_trans(REG_PT_MASK(0), devc->protocol_trigger.mask[0]);
+       ops[13] = mso_trans(REG_PT_MASK(1), devc->protocol_trigger.mask[1]);
+       ops[14] = mso_trans(REG_PT_MASK(2), devc->protocol_trigger.mask[2]);
+       ops[15] = mso_trans(REG_PT_MASK(3), devc->protocol_trigger.mask[3]);
+       ops[16] = mso_trans(REG_PT_SPIMODE, devc->protocol_trigger.spimode);
        /* Select the default config bank */
-       ops[15] = mso_trans(REG_CTL2, devc->ctlbase2);
+       ops[17] = mso_trans(REG_CTL2, devc->ctlbase2);
 
        return mso_send_control_message(devc->serial, ARRAY_AND_SIZE(ops));
 }
@@ -335,13 +337,11 @@ SR_PRIV int mso_check_trigger(struct sr_serial_dev_inst *serial, uint8_t *info)
        int ret;
 
        sr_dbg("Requesting trigger state.");
-  printf("Send Controll message\n");
        ret = mso_send_control_message(serial, ARRAY_AND_SIZE(ops));
        if (info == NULL || ret != SR_OK)
                return ret;
 
 
-  printf("REad buffer\n");
   uint8_t buf = 0;
        if (serial_read(serial, &buf, 1) != 1) /* FIXME: Need timeout */
                ret = SR_ERR;
@@ -387,9 +387,9 @@ SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data)
    * to read the data */
   if (devc->trigger_state != MSO_TRIGGER_DATAREADY) {
     devc->trigger_state = in[0];
-    printf("Got %c for trigger \n", in[0]);
+    //printf("Got %c for trigger \n", in[0]);
     if (devc->trigger_state == MSO_TRIGGER_DATAREADY) {
-      printf("Trigger is ready %c\n", MSO_TRIGGER_DATAREADY);
+      //printf("Trigger is ready %c\n", MSO_TRIGGER_DATAREADY);
       mso_read_buffer(sdi);
       devc->buffer_n = 0;
     } else {
@@ -450,59 +450,42 @@ SR_PRIV int mso_receive_data(int fd, int revents, void *cb_data)
 
 SR_PRIV int mso_configure_probes(const struct sr_dev_inst *sdi)
 {
-
        struct dev_context *devc;
        struct sr_probe *probe;
        GSList *l;
        int probe_bit, stage, i;
        char *tc;
 
-  /*
+  
        devc = sdi->priv;
-       for (i = 0; i < NUM_TRIGGER_STAGES; i++) {
-               devc->la_trigger_mask[i] = 0;
-               devc->la_trigger[i] = 0;
-       }
 
-       stage = -1;
+  devc->la_trigger_mask = 0xFF; //the mask for the LA_TRIGGER (bits set to 0 matter, those set to 1 are ignored).
+  devc->la_trigger = 0x00;  //The value of the LA byte that generates a trigger event (in that mode).
+  devc->dso_trigger_voltage = 3;
+  devc->dso_probe_attn = 1;
+  devc->trigger_outsrc = 0;
+  devc->trigger_chan = 3; //LA combination trigger
+  devc->use_trigger = FALSE;
+
        for (l = sdi->probes; l; l = l->next) {
                probe = (struct sr_probe *)l->data;
                if (probe->enabled == FALSE)
                        continue;
 
-               //if (probe->index > 7)
-               //      devc->sample_wide = TRUE;
-
-               probe_bit = 1 << (probe->index);
+               int probe_bit = 1 << (probe->index);
                if (!(probe->trigger))
                        continue;
 
+    devc->use_trigger = TRUE;
                //Configure trigger mask and value.
-               stage = 0;
                for (tc = probe->trigger; *tc; tc++) {
-                       devc->trigger_mask[stage] |= probe_bit;
-                       if (*tc == '1')
-                               devc->trigger_value[stage] |= probe_bit;
-                       stage++;
-                       if (stage > NUM_TRIGGER_STAGES)
-                               return SR_ERR;
-               }
-       }
-
-  */
-
-       //if (stage == -1)
-       //      /*
-       //       * We didn't configure any triggers, make sure acquisition
-       //       * doesn't wait for any.
-       //       */
-       //      devc->trigger_stage = TRIGGER_FIRED;
-       //else
-       //      devc->trigger_stage = 0;
+                       devc->la_trigger_mask &= ~probe_bit;
+      if (*tc == '1')
+        devc->la_trigger |= probe_bit;
+    }
+  }
 
        return SR_OK;
-
-
 }
 
 

diff --git a/hardware/link-mso19/protocol.h b/hardware/link-mso19/protocol.h
index 38514404f98405be40f85da9b3bc0efe3f01e995..474fba1497b9f8ec748ecb8975279f71e4c94324 100644 (file)
--- a/hardware/link-mso19/protocol.h
+++ b/hardware/link-mso19/protocol.h
@@ -40,7 +40,7 @@
 
 #define NUM_PROBES             8
 #define NUM_TRIGGER_STAGES     4
-#define TRIGGER_TYPES          "01"
+#define TRIGGER_TYPES          "01" //the first r/f is used for the whole group
 #define SERIALCOMM "460800/8n1/flow=2" 
 #define SERIALCONN "/dev/ttyUSB0" 
 #define CLOCK_RATE             SR_MHZ(100)
@@ -54,6 +54,11 @@
 #define MSO_TRIGGER_FIRED      '5'
 #define MSO_TRIGGER_DATAREADY  '6'
 
+enum trigger_slopes {
+  SLOPE_POSITIVE = 0, 
+  SLOPE_NEGATIVE,
+};
+
 /* Structure for the pattern generator state */
 struct mso_patgen {
        /* Pattern generator clock config */
@@ -102,10 +107,12 @@ struct dev_context {
        uint8_t la_threshold;
        uint64_t cur_rate;
        uint8_t dso_probe_attn;
+  int8_t  use_trigger;
        uint8_t trigger_chan;
        uint8_t trigger_slope;
        uint8_t trigger_outsrc;
        uint8_t trigger_state;
+       uint8_t trigger_holdoff[2];
        uint8_t la_trigger;
        uint8_t la_trigger_mask;
        double dso_trigger_voltage;