]> sigrok.org Git - libsigrokdecode.git/commit
uart: Optimize handling of samples when tx and rx are both idle
authorDaniel Thompson <redacted>
Fri, 22 Jan 2016 08:29:09 +0000 (08:29 +0000)
committerUwe Hermann <redacted>
Thu, 28 Jan 2016 23:14:57 +0000 (00:14 +0100)
commit96a044da40fd33e6f3273f0052fdd12f54770150
tree6ad28cbc8efcf0ebd4fa1f8d346ac7ad71e8d96d
parent27c69645218c7cc88c991c8c18b585ffd092acc0
uart: Optimize handling of samples when tx and rx are both idle

Re-enable the fast path for identical samples but only when both
pins are waiting for the start bit. For sparse data sets (I tested
UT61E capture log) the optimization results in a >4x decode
improvement.
decoders/uart/pd.py