Fix DSLogic FPGA binary image upload and signal acquisition.

Fix DSLogic FPGA binary image upload and signal acquisition.

For some reason, uploading the FPGA binary into DSLogic in small chunks
does not work. In this commit, the whole binary image is loaded into memory
and transfer is done in one chunk.

Furthermore, the FPGA configuration structure was not initialized
properly. This was changed with the initialization values taken from the
original DSLogic software.

Signed-off-by: Diego Asanza <redacted>