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(parent: 40a0db1)
kingst-la2016: zero pad FPGA bitstream to 4KiB boundaries
authorGerhard Sittig <redacted>
Mon, 21 Feb 2022 20:43:16 +0000 (21:43 +0100)
committerGerhard Sittig <redacted>
Tue, 22 Feb 2022 20:53:20 +0000 (21:53 +0100)
commit1c445e0854b729151accae1b49e5bfb90694c770
tree6b873a654f2bbfabb254c6918ac82d81b43f5767tree | snapshot
parent40a0db1ea836ec110191f86d084e7d1ed0630499commit | diff
kingst-la2016: zero pad FPGA bitstream to 4KiB boundaries

The 2KiB padding worked for LA2016 but kept looking susipcious. Pad the
FPGA bitstream to 4KiB boundaries, which unbreaks LA5016 and still works
with LA2016.
src/hardware/kingst-la2016/protocol.h diff | blob | blame | history
Hardware access and backend lib