Bug 881 - unexpected order of frame marker and logic data
Summary: unexpected order of frame marker and logic data
Status: CONFIRMED
Alias: None
Product: sigrok-cli
Classification: Unclassified
Component: Other (show other bugs)
Version: unreleased development snapshot
Hardware: All All
: Normal normal
Target Milestone: ---
Assignee: Nobody
URL:
Keywords:
Depends on:
Blocks:
 
Reported: 2017-01-08 13:42 CET by Gerhard Sittig
Modified: 2017-01-08 13:42 CET (History)
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Description Gerhard Sittig 2017-01-08 13:42:35 CET 
noticed with a Hameg HMO2524 setup:

the hameg-hmo driver sends SR_DF_HEADER, then SR_DF_FRAME_BEGIN,
then SR_DF_ANALOG and SR_DF_LOGIC, then SR_DF_FRAME_END, then SR_DF_END

the sigrok-cli output prints sample data in units of 64bits each,
then prints frame end, then "flushes"(?) previously queued(?) data
that did not fill up the next 64bits block

-----
$ DRV=hameg-hmo:conn=/dev/ttyUSB0
$ CH=CH1,CH2,D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15
$ sigrok-cli --driver $DRV --channels $CH --frames 1
...
D11:00000000 00000000 00000000 00111111 11111111 11111111 11111111 11111111
D12:00000000 00000000 00000000 00111111 11111111 11111111 11111111 11111111
D13:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
D14:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
D15:00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
FRAME-END
D0:10010010 01001001 00100100 10010010 01001001 00100100 
D1:00000000 00000000 00000000 00000000 00000000 00000000 
D2:01001001 00100100 10010010 01001001 00100100 10010010 
D3:00000000 00000000 00000000 00000000 00000000 00000000 
D4:11011011 01101101 10110110 11011011 01101101 10110110 
D5:01001001 00100100 10010010 01001001 00100100 10010010 
D6:01101101 10110110 11011011 01101101 10110110 11011011 
D7:01110001 11000111 00011100 01110001 11000111 00011100 
D8:11111000 00111111 11111000 00000000 00000111 11111111 
D9:11111000 00000000 11111111 11000000 00000000 00000000 
D10:11111000 00000000 00000000 00000000 00000000 00000000 
D11:11111111 11111111 11111111 11111111 11111111 11111111 
D12:11111111 11111111 11111111 11111111 11111111 11111111 
D13:00000111 11111111 11111111 11111111 11111111 11111111 
D14:00000000 00000000 00000000 00000000 00000000 00000000 
D15:00000000 00000000 00000000 00000000 00000000 00000000 
-----

the "FRAME-END" output is from libsigrok/src/output/analog.c:receive(),
is the actual issue that frames can contain both analog and logic data
and the generation of sigrok-cli(1) output does not fully reflect that?
is libsigrok/src/output/bits.c in need of adjustment, or needs
sigrok-cli/session.c take care of printing frame markers?