Difference between revisions of "Logic Shrimp"
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[[File:logic-shrimp-front.png|thumb|right|Logic Shrimp | [[File:logic-shrimp-front.png|thumb|right|Dangerous Prototypes Logic Shrimp]] | ||
The [http://dangerousprototypes.com/docs/Logic_Shrimp_logic_analyzer Logic Shrimp] is a USB-based logic analyzer | The [http://dangerousprototypes.com/docs/Logic_Shrimp_logic_analyzer Dangerous Prototypes Logic Shrimp] is a USB-based, 4-channel logic analyzer with up to 20MHz sampling rate. | ||
The design is available under a Creative Commons (CC-BY-SA) license. | |||
See [[Logic Shrimp/Info]] for more details (such as '''lsusb -vvv''' output) about the device. | See [[Logic Shrimp/Info]] for more details (such as '''lsusb -vvv''' output) about the device. | ||
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The device essentially consists of a PIC microchip running at 20MHz, sampling each of its 4 probes into its own 256K SRAM chip. A buffer chip makes the design 5V tolerant. | The device essentially consists of a PIC microchip running at 20MHz, sampling each of its 4 probes into its own 256K SRAM chip. A buffer chip makes the design 5V tolerant. | ||
== | == Photos == | ||
<gallery> | |||
File:logic-shrimp-front.png|<small>PCB, front</small> | |||
File:logic-shrimp-back.png|<small>PCB, back</small> | |||
</gallery> | |||
== Protocol == | |||
The PIC uses the [http://dangerousprototypes.com/docs/The_Logic_Sniffer%27s_extended_SUMP_protocol extended SUMP protocol], as used by the [[Openbench Logic Sniffer]] driver. It is thus supported in sigrok out of the box. However, the current firmware in the Logic Shrimp does not properly publish metadata according to its capabilities. In order to get valid data from it, make sure to always restrict the probes sampled to 1-4. | |||
== Resources == | |||
TODO. | |||
[[Category:Device]] | [[Category:Device]] | ||
[[Category:Logic | [[Category:Logic analyzer]] | ||
[[Category:Supported]] | [[Category:Supported]] | ||
Revision as of 17:45, 11 November 2012
The Dangerous Prototypes Logic Shrimp is a USB-based, 4-channel logic analyzer with up to 20MHz sampling rate.
The design is available under a Creative Commons (CC-BY-SA) license.
See Logic Shrimp/Info for more details (such as lsusb -vvv output) about the device.
Hardware
The device essentially consists of a PIC microchip running at 20MHz, sampling each of its 4 probes into its own 256K SRAM chip. A buffer chip makes the design 5V tolerant.
Photos
PCB, front
PCB, back
Protocol
The PIC uses the extended SUMP protocol, as used by the Openbench Logic Sniffer driver. It is thus supported in sigrok out of the box. However, the current firmware in the Logic Shrimp does not properly publish metadata according to its capabilities. In order to get valid data from it, make sure to always restrict the probes sampled to 1-4.
Resources
TODO.