Difference between revisions of "Dangerous Prototypes Buspirate"

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[[File:Buspirate v4 mugshot.jpg|thumb|right|Buspirate v4]]
{{Infobox logic analyzer
[[File:Buspirate v3.png|thumb|right|Buspirate v3]]
| image            = [[File:Buspirate v3.png|180px]]
| name            = Dangerous Prototypes Buspirate
| status          = supported
| source_code_dir  = openbench-logic-sniffer
| channels        = 5
| samplerate      = 1MHz
| samplerate_state = —
| triggers        = ?
| voltages        = ?
| memory          = 4096 samples
| compression      = none
| website          = [http://dangerousprototypes.com/2009/11/03/bus-pirate-logic-analyzer-mode/ dangerousprototypes.com]
}}


The [http://dangerousprototypes.com/2009/11/03/bus-pirate-logic-analyzer-mode/ Dangerous Prototypes Buspirate] supports a logic analyzer mode and can thus be used for sample captures, however only at low speeds. To quote from the announcement: ''The Bus Pirate can’t store a lot of samples, it can’t feed live samples very fast, and speeds are in the kHz range''.
The '''Dangerous Prototypes Buspirate''' supports a logic analyzer mode and can thus be used for sample captures, however only at low speeds. To quote from the announcement: ''The Bus Pirate can’t store a lot of samples, it can’t feed live samples very fast, and speeds are in the kHz range''.


See [[Buspirate/Info]] for more details (such as '''lsusb -vvv''' output) about the device.
See [[Dangerous Prototypes Buspirate/Info]] for more details (such as '''lsusb -v''' output) about the device.


== Hardware ==
== Hardware ==


TODO.
* Microchip PIC24FJ64GA
* FTDI FT232RL
* NXP 74HC4066D


== Photos ==
== Photos ==
Line 14: Line 28:
<gallery>
<gallery>
File:Buspirate v4 mugshot.jpg|<small>Buspirate v4, front</small>
File:Buspirate v4 mugshot.jpg|<small>Buspirate v4, front</small>
File:Buspirate_v3_front.jpg|<small>Buspirate v3, front</small>
File:Buspirate v3 mugshot.jpg|<small>Buspirate v3, front</small>
File:Buspirate_v3_back.jpg|<small>Buspirate v3, back</small>
File:Buspirate_v3_back.jpg|<small>Buspirate v3, back</small>
File:Buspirate v3 sparkfun top.jpg|<small>Buspirate v3/Sparkfun, front</small>
File:Buspirate v3 sparkfun bottom.jpg|<small>Buspirate v3/Sparkfun, back</small>
</gallery>
</gallery>


== Protocol ==
== Protocol ==


TODO.
The buspirate (in logic analyzer mode) uses a simplified version of the [[Openbench_Logic_Sniffer#Protocol|"extended SUMP" protocol]].


== Resources ==
== Resources ==


TODO.
* [http://dangerousprototypes.com/docs/Bus_Pirate Bus Pirate] (main wiki page)


[[Category:Device]]
[[Category:Device]]
[[Category:Logic analyzer]]
[[Category:Logic analyzer]]
[[Category:In progress]]
[[Category:Supported]]
[[Category:Sump protocol]]
[[Category:Open source hardware]]

Revision as of 15:30, 23 November 2014

Dangerous Prototypes Buspirate
Buspirate v3.png
Status supported
Source code openbench-logic-sniffer
Channels 5
Samplerate 1MHz
Samplerate (state)
Triggers ?
Min/max voltage ?
Memory 4096 samples
Compression none
Website dangerousprototypes.com

The Dangerous Prototypes Buspirate supports a logic analyzer mode and can thus be used for sample captures, however only at low speeds. To quote from the announcement: The Bus Pirate can’t store a lot of samples, it can’t feed live samples very fast, and speeds are in the kHz range.

See Dangerous Prototypes Buspirate/Info for more details (such as lsusb -v output) about the device.

Hardware

  • Microchip PIC24FJ64GA
  • FTDI FT232RL
  • NXP 74HC4066D

Photos

Protocol

The buspirate (in logic analyzer mode) uses a simplified version of the "extended SUMP" protocol.

Resources