From: Gerhard Sittig <redacted>
Date: Sun, 16 Oct 2016 16:26:18 +0000 (+0200)
Subject: uart: skip frames with invalid start bits
X-Git-Tag: libsigrokdecode-0.5.0~135
X-Git-Url: http://sigrok.org/gitweb/?p=libsigrokdecode.git;a=commitdiff_plain;h=711d0602317e28ddc123ab540036b37979df70c4;ds=sidebyside

uart: skip frames with invalid start bits

When the start bit is not low at its sample point, then stop trying
to interpret the remaining frame -- it's already known to be invalid,
anyway.

Wait for the next start bit instead, assuming that either the falling
edge which started the inspection of the UART frame and its start bit
was a spurious glitch or that the captured signal does not communicate
at the decoder's configured bitrate.

Signed-off-by: Gerhard Sittig <redacted>
---

diff --git a/decoders/uart/pd.py b/decoders/uart/pd.py
index af773b4..093f3fc 100644
--- a/decoders/uart/pd.py
+++ b/decoders/uart/pd.py
@@ -223,11 +223,13 @@ class Decoder(srd.Decoder):
 
         self.startbit[rxtx] = signal
 
-        # The startbit must be 0. If not, we report an error.
+        # The startbit must be 0. If not, we report an error and wait
+        # for the next start bit (assuming this one was spurious).
         if self.startbit[rxtx] != 0:
             self.putp(['INVALID STARTBIT', rxtx, self.startbit[rxtx]])
             self.putg([rxtx + 10, ['Frame error', 'Frame err', 'FE']])
-            # TODO: Abort? Ignore rest of the frame?
+            self.state[rxtx] = 'WAIT FOR START BIT'
+            return
 
         self.cur_data_bit[rxtx] = 0
         self.datavalue[rxtx] = 0