X-Git-Url: http://sigrok.org/gitweb/?p=libsigrokdecode.git;a=blobdiff_plain;f=decoders%2Ftca6408a%2Fpd.py;fp=decoders%2Ftca6408a%2Fpd.py;h=4ca1082a8bcfe9e2645d46ac502063332d898530;hp=0d63cc38e467575e32256df82725eecb7f375e12;hb=114adb4997b71e93267e3816710c8b019ae927c0;hpb=b8c8dc8a649ad0a76bccbfae7198cc9c8cb2ccda

diff --git a/decoders/tca6408a/pd.py b/decoders/tca6408a/pd.py
index 0d63cc3..4ca1082 100644
--- a/decoders/tca6408a/pd.py
+++ b/decoders/tca6408a/pd.py
@@ -64,6 +64,9 @@ class Decoder(srd.Decoder):
         self.out_ann = self.register(srd.OUTPUT_ANN)
         self.out_logic = self.register(srd.OUTPUT_LOGIC)
 
+    def flush(self):
+        self.put_logic_states()
+
     def putx(self, data):
         self.put(self.ss, self.es, self.out_ann, data)
 
@@ -78,6 +81,7 @@ class Decoder(srd.Decoder):
         # TODO
 
     def handle_reg_0x01(self, b):
+        self.put_logic_states()
         self.putx([1, ['Outputs set: %02X' % b]])
         self.logic_value = b
 
@@ -109,8 +113,6 @@ class Decoder(srd.Decoder):
         # Store the start/end samples of this I²C packet.
         self.ss, self.es = ss, es
 
-        self.put_logic_states()
-
         # State machine.
         if self.state == 'IDLE':
             # Wait for an I²C START condition.