X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=src%2Fhardware%2Fsysclk-lwla%2Fapi.c;h=36c9ee608bfc7dc05796437cae9728707ee8e023;hb=786485772ffd28dfb1ca7375ca64118ccd7af25c;hp=891062560b0d5a09e86d5c24928a38dec6441ce3;hpb=940805ce7dbd26c32f2e8b3512fdc54432b412db;p=libsigrok.git diff --git a/src/hardware/sysclk-lwla/api.c b/src/hardware/sysclk-lwla/api.c index 89106256..36c9ee60 100644 --- a/src/hardware/sysclk-lwla/api.c +++ b/src/hardware/sysclk-lwla/api.c @@ -329,10 +329,13 @@ static int dev_open(struct sr_dev_inst *sdi) sr_usb_close(usb); return ret; } + /* This delay appears to be necessary for reliable operation. */ + g_usleep(30 * 1000); sdi->status = SR_ST_ACTIVE; devc->active_fpga_config = FPGA_NOCONF; + devc->short_transfer_quirk = FALSE; devc->state = STATE_IDLE; ret = (*devc->model->apply_fpga_config)(sdi); @@ -343,8 +346,12 @@ static int dev_open(struct sr_dev_inst *sdi) if (ret != SR_OK) { sdi->status = SR_ST_INACTIVE; sr_usb_close(usb); + return ret; } - return ret; + if (devc->short_transfer_quirk) + sr_warn("Short transfer quirk detected! " + "Memory reads will be slow."); + return SR_OK; } /* Shutdown and close device.