X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=src%2Fhardware%2Fkingst-la2016%2Fprotocol.h;h=dd1092446d06d6db15fa1c19007615b465a3fe11;hb=81ceb6a51dd666987fb5c67b83c5ba14d105b301;hp=2f28d57bc52ed9712b26d58715df2617b55ecc29;hpb=ffcf1e455d51c1a96a67193edc8a7ad0a4d44b81;p=libsigrok.git diff --git a/src/hardware/kingst-la2016/protocol.h b/src/hardware/kingst-la2016/protocol.h index 2f28d57b..dd109244 100644 --- a/src/hardware/kingst-la2016/protocol.h +++ b/src/hardware/kingst-la2016/protocol.h @@ -67,7 +67,7 @@ * The device expects some zero padding to follow the content of the * file which contains the FPGA bitstream. Specify the chunk size here. */ -#define LA2016_EP2_PADDING 2048 +#define LA2016_EP2_PADDING 4096 /* * Whether the logic input threshold voltage is a config item of the @@ -91,6 +91,11 @@ #define LA2016_NUM_PWMCH_MAX 2 +/* Streaming mode related thresholds. Not enforced, used for warnings. */ +#define LA2016_STREAM_MBPS_MAX 200 /* In units of Mbps. */ +#define LA2016_STREAM_PUSH_THR 16 /* In units of Mbps. */ +#define LA2016_STREAM_PUSH_IVAL 250 /* In units of ms. */ + /* * Whether to de-initialize the device hardware in the driver's close * callback. It is desirable to e.g. configure PWM channels and leave @@ -102,12 +107,13 @@ #define LA2016_CONVBUFFER_SIZE (4 * 1024 * 1024) struct kingst_model { - uint8_t magic; /* EEPROM magic byte value. */ + uint8_t magic, magic2; /* EEPROM magic byte values. */ const char *name; /* User perceived model name. */ const char *fpga_stem; /* Bitstream filename stem. */ uint64_t samplerate; /* Max samplerate in Hz. */ size_t channel_count; /* Max channel count (16, 32). */ uint64_t memory_bits; /* RAM capacity in Gbit (1, 2, 4). */ + uint64_t baseclock; /* Base clock to derive samplerate from. */ }; struct dev_context { @@ -115,7 +121,7 @@ struct dev_context { char *mcu_firmware; char *fpga_bitstream; uint64_t fw_uploaded; /* Timestamp of most recent FW upload. */ - uint8_t identify_magic; + uint8_t identify_magic, identify_magic2; const struct kingst_model *model; struct sr_channel_group *cg_logic, *cg_pwm; @@ -129,6 +135,7 @@ struct dev_context { uint64_t samplerate; struct sr_sw_limits sw_limits; uint64_t capture_ratio; + gboolean continuous; /* Internal acquisition and download state. */ gboolean trigger_involved; @@ -151,6 +158,15 @@ struct dev_context { struct feed_queue_logic *feed_queue; GSList *transfers; size_t transfer_bufsize; + struct stream_state_t { + size_t enabled_count; + uint32_t enabled_mask; + uint32_t channel_masks[32]; + size_t channel_index; + uint32_t sample_data[32]; + uint64_t flush_period_ms; + uint64_t last_flushed; + } stream; }; SR_PRIV int la2016_upload_firmware(const struct sr_dev_inst *sdi,