X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=src%2Fhardware%2Fasix-sigma%2Fapi.c;h=b8d68e9a0118c433184ab7a68f0c4ae3277bcb5b;hb=3f5f5484100ba39dafa4d90b84d25cd3d871d2f2;hp=81a5df9380904c48752d79e14d45bec2ae89a99f;hpb=7718f3ca8fbf1f785df5cdd4663f12dabf18d3bd;p=libsigrok.git

diff --git a/src/hardware/asix-sigma/api.c b/src/hardware/asix-sigma/api.c
index 81a5df93..b8d68e9a 100644
--- a/src/hardware/asix-sigma/api.c
+++ b/src/hardware/asix-sigma/api.c
@@ -248,13 +248,12 @@ static GSList *scan(struct sr_dev_driver *di, GSList *options)
 		devc->id.serno = serno_num;
 		devc->id.prefix = serno_pre;
 		devc->id.type = dev_type;
-		sr_sw_limits_init(&devc->cfg_limits);
+		sr_sw_limits_init(&devc->limit.config);
 		devc->capture_ratio = 50;
-		devc->use_triggers = 0;
+		devc->use_triggers = FALSE;
 
-		/* TODO Retrieve some of this state from hardware? */
-		devc->firmware_idx = SIGMA_FW_NONE;
-		devc->clock.samplerate = sigma_get_samplerate(sdi);
+		/* Get current hardware configuration (or use defaults). */
+		(void)sigma_fetch_hw_config(sdi);
 	}
 	libusb_free_device_list(devlist, 1);
 	g_slist_free_full(conn_devices, (GDestroyNotify)sr_usb_dev_inst_free);
@@ -317,7 +316,7 @@ static int config_get(uint32_t key, GVariant **data,
 		break;
 	case SR_CONF_LIMIT_MSEC:
 	case SR_CONF_LIMIT_SAMPLES:
-		return sr_sw_limits_config_get(&devc->cfg_limits, key, data);
+		return sr_sw_limits_config_get(&devc->limit.config, key, data);
 #if ASIX_SIGMA_WITH_TRIGGER
 	case SR_CONF_CAPTURE_RATIO:
 		*data = g_variant_new_uint64(devc->capture_ratio);
@@ -376,7 +375,7 @@ static int config_set(uint32_t key, GVariant *data,
 		break;
 	case SR_CONF_LIMIT_MSEC:
 	case SR_CONF_LIMIT_SAMPLES:
-		return sr_sw_limits_config_set(&devc->cfg_limits, key, data);
+		return sr_sw_limits_config_set(&devc->limit.config, key, data);
 #if ASIX_SIGMA_WITH_TRIGGER
 	case SR_CONF_CAPTURE_RATIO:
 		devc->capture_ratio = g_variant_get_uint64(data);
@@ -425,12 +424,12 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 	struct dev_context *devc;
 	uint16_t pindis_mask;
 	uint8_t async, div;
-	int triggerpin, ret;
+	int ret;
+	size_t triggerpin;
 	uint8_t trigsel2;
 	struct triggerinout triggerinout_conf;
 	struct triggerlut lut;
-	uint8_t regval, trgconf_bytes[2], clock_bytes[4], *wrptr;
-	size_t count;
+	uint8_t regval, cmd_bytes[4], *wrptr;
 
 	devc = sdi->priv;
 
@@ -478,9 +477,9 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 
 		/* Find which pin to trigger on from mask. */
 		for (triggerpin = 0; triggerpin < 8; triggerpin++) {
-			if (devc->trigger.risingmask & (1 << triggerpin))
+			if (devc->trigger.risingmask & BIT(triggerpin))
 				break;
-			if (devc->trigger.fallingmask & (1 << triggerpin))
+			if (devc->trigger.fallingmask & BIT(triggerpin))
 				break;
 		}
 
@@ -511,8 +510,8 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 
 	/* Setup trigger in and out pins to default values. */
 	memset(&triggerinout_conf, 0, sizeof(triggerinout_conf));
-	triggerinout_conf.trgout_bytrigger = 1;
-	triggerinout_conf.trgout_enable = 1;
+	triggerinout_conf.trgout_bytrigger = TRUE;
+	triggerinout_conf.trgout_enable = TRUE;
 	/* TODO
 	 * Verify the correctness of this implementation. The previous
 	 * version used to assign to a C language struct with bit fields
@@ -522,7 +521,7 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 	 * Which means that I could not verify "on paper" either. Let's
 	 * re-visit this code later during research for trigger support.
 	 */
-	wrptr = trgconf_bytes;
+	wrptr = cmd_bytes;
 	regval = 0;
 	if (triggerinout_conf.trgout_bytrigger)
 		regval |= TRGOPT_TRGOOUTEN;
@@ -531,9 +530,8 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 	if (triggerinout_conf.trgout_enable)
 		regval |= TRGOPT_TRGOEN;
 	write_u8_inc(&wrptr, regval);
-	count = wrptr - trgconf_bytes;
 	ret = sigma_write_register(devc, WRITE_TRIGGER_OPTION,
-		trgconf_bytes, count);
+		cmd_bytes, wrptr - cmd_bytes);
 	if (ret != SR_OK)
 		return ret;
 
@@ -552,12 +550,12 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 	 * Derive a mask where bits are set for unavailable channels.
 	 * Either send the single byte, or the full byte sequence.
 	 */
-	pindis_mask = ~((1UL << devc->num_channels) - 1);
+	pindis_mask = ~BITS_MASK(devc->num_channels);
 	if (devc->clock.samplerate > SR_MHZ(50)) {
 		ret = sigma_set_register(devc, WRITE_CLOCK_SELECT,
 			pindis_mask & 0xff);
 	} else {
-		wrptr = clock_bytes;
+		wrptr = cmd_bytes;
 		/* Select 50MHz base clock, and divider. */
 		async = 0;
 		div = SR_MHZ(50) / devc->clock.samplerate - 1;
@@ -581,7 +579,7 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 		write_u8_inc(&wrptr, div);
 		write_u16be_inc(&wrptr, pindis_mask);
 		ret = sigma_write_register(devc, WRITE_CLOCK_SELECT,
-			clock_bytes, wrptr - clock_bytes);
+			cmd_bytes, wrptr - cmd_bytes);
 	}
 	if (ret != SR_OK)
 		return ret;
@@ -594,9 +592,8 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi)
 
 	/* Start acqusition. */
 	regval = WMR_TRGRES | WMR_SDRAMWRITEEN;
-#if ASIX_SIGMA_WITH_TRIGGER
-	regval |= WMR_TRGEN;
-#endif
+	if (devc->use_triggers && ASIX_SIGMA_WITH_TRIGGER)
+		regval |= WMR_TRGEN;
 	ret = sigma_set_register(devc, WRITE_MODE, regval);
 	if (ret != SR_OK)
 		return ret;