X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=sainsmart_dds120.c;h=2c3b73c67f2757496e3ca5415ce0fecdd9614261;hb=d67ced51c6900f948c5e1ff13d30d6aa90cb1300;hp=6748d47bd286cd1973efe7735c2a818ebd1ec00a;hpb=a425fae9a25f54af8d514aff8824382f7b317ba4;p=sigrok-firmware-fx2lafw.git diff --git a/sainsmart_dds120.c b/sainsmart_dds120.c index 6748d47b..2c3b73c6 100644 --- a/sainsmart_dds120.c +++ b/sainsmart_dds120.c @@ -15,8 +15,7 @@ * Lesser General Public License for more details. * * You should have received a copy of the GNU Lesser General Public - * License along with this library; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA + * License along with this library; if not, see . */ #include @@ -288,7 +287,7 @@ static BOOL set_samplerate(BYTE rate) IFCONFIG = samplerates[i].ifcfg; AUTOPTRSETUP = 7; - AUTOPTRH2 = 0xE4; + AUTOPTRH2 = 0xE4; /* 0xE400: GPIF waveform descriptor 0. */ AUTOPTRL2 = 0x00; /* @@ -305,6 +304,7 @@ static BOOL set_samplerate(BYTE rate) * jump 0, CTL2=Z, FIFO, LOOP */ + /* LENGTH / BRANCH 0-7 */ EXTAUTODAT2 = samplerates[i].wait0; EXTAUTODAT2 = samplerates[i].wait1; EXTAUTODAT2 = 1; @@ -314,24 +314,27 @@ static BOOL set_samplerate(BYTE rate) EXTAUTODAT2 = 0; EXTAUTODAT2 = 0; + /* OPCODE 0-7 */ EXTAUTODAT2 = samplerates[i].opc0; EXTAUTODAT2 = samplerates[i].opc1; - EXTAUTODAT2 = 1; + EXTAUTODAT2 = 1; /* DATA=0 DP=1 */ EXTAUTODAT2 = 0; EXTAUTODAT2 = 0; EXTAUTODAT2 = 0; EXTAUTODAT2 = 0; EXTAUTODAT2 = 0; + /* OUTPUT 0-7 */ EXTAUTODAT2 = samplerates[i].out0; - EXTAUTODAT2 = 0x44; - EXTAUTODAT2 = 0x44; - EXTAUTODAT2 = 0x00; - EXTAUTODAT2 = 0x00; - EXTAUTODAT2 = 0x00; - EXTAUTODAT2 = 0x00; - EXTAUTODAT2 = 0x00; + EXTAUTODAT2 = 0x44; /* OE0=1, CTL0=1 */ + EXTAUTODAT2 = 0x44; /* OE0=1, CTL0=1 */ + EXTAUTODAT2 = 0; + EXTAUTODAT2 = 0; + EXTAUTODAT2 = 0; + EXTAUTODAT2 = 0; + EXTAUTODAT2 = 0; + /* LOGIC FUNCTION 0-7 */ EXTAUTODAT2 = 0; EXTAUTODAT2 = 0; EXTAUTODAT2 = 0; @@ -352,18 +355,18 @@ static BOOL set_calibration_pulse(BYTE fs) switch (fs) { case 0: // 100Hz RCAP2L = -10000 & 0xff; - RCAP2H = (-10000 >> 8) & 0xff; + RCAP2H = (-10000 & 0xff00) >> 8; return TRUE; case 1: // 1kHz RCAP2L = -1000 & 0xff; - RCAP2H = (-1000 >> 8) & 0xff; + RCAP2H = (-1000 & 0xff00) >> 8; return TRUE; case 10: // 1kHz - RCAP2L = -100 & 0xff; + RCAP2L = (BYTE)(-100 & 0xff); RCAP2H = 0xff; return TRUE; case 50: // 50kHz - RCAP2L = -20 & 0xff; + RCAP2L = (BYTE)(-20 & 0xff); RCAP2H = 0xff; return TRUE; default: @@ -452,8 +455,8 @@ static void init(void) EP8CFG = 0; /* In idle mode tristate all outputs. */ - GPIFIDLECTL = 0x00; - GPIFCTLCFG = 0x80; + GPIFIDLECTL = 0x00; /* Don't enable CTL0-5 outputs. */ + GPIFCTLCFG = 0x80; /* TRICTL=1. CTL0-2: CMOS outputs, tri-statable. */ GPIFWFSELECT = 0x00; GPIFREADYSTAT = 0x00; @@ -487,7 +490,7 @@ static void main(void) /* Init timer2. */ RCAP2L = -1000 & 0xff; - RCAP2H = (-1000 >> 8) & 0xff; + RCAP2H = (-1000 & 0xff00) >> 8; T2CON = 0; ET2 = 1; TR2 = 1;