X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=i2c%2Frtc_epson_8564je%2FREADME;h=a896bc5cbbcae8a0bdb45aee45774306c62a163a;hb=db3aac315ac81371376e3f2aaf4808209c618b2b;hp=decf739db8fa2fb10648bb5e286a84c0bdb1ae50;hpb=f793c6d26e576d436b93b3414a00b9d2fcdcdaba;p=sigrok-dumps.git

diff --git a/i2c/rtc_epson_8564je/README b/i2c/rtc_epson_8564je/README
index decf739..a896bc5 100644
--- a/i2c/rtc_epson_8564je/README
+++ b/i2c/rtc_epson_8564je/README
@@ -1,16 +1,16 @@
 -------------------------------------------------------------------------------
-Epson 8564JE I2C RTC
+Epson RTC-8564 JE/NB
 -------------------------------------------------------------------------------
 
-This an example capture of I2C traffic from/to an Epson 8564JE I2C RTC chip,
-which has a slave address of 0x51 (or 0xa2, if the read/write bit is included).
+This is an example capture of I2C traffic from/to an Epson RTC-8564 JE/NB
+I2C RTC chip, which has a slave address of 0x51 (or 0xa2, if the read/write
+bit is included).
 
 
 Logic analyzer setup
 --------------------
 
-The logic analyzer used for capturing was a ChronoVu LA8 at a sample rate
-of 1MHz. The logic analyzer probes were connected to the RTC chip like this:
+The logic analyzer used was a ChronoVu LA8 (at 1MHz):
 
   Probe       RTC chip pin
   ------------------------