X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=hardware%2Fzeroplus-logic-cube%2Fanalyzer.c;h=c404a66b73b04a47324f5c5c539c866fe8a0300e;hb=5a7e62211c4714ea2aac35baac10cf448373d4f5;hp=1bf1f65b2abdb29593642b8147784a7fb713b2ef;hpb=aad031928e5457ea8f7e4452401d55dcb8cb4cf1;p=libsigrok.git

diff --git a/hardware/zeroplus-logic-cube/analyzer.c b/hardware/zeroplus-logic-cube/analyzer.c
index 1bf1f65b..c404a66b 100644
--- a/hardware/zeroplus-logic-cube/analyzer.c
+++ b/hardware/zeroplus-logic-cube/analyzer.c
@@ -118,6 +118,7 @@ static int g_memory_size = MEMORY_SIZE_8K;
 static int g_ramsize_triggerbar_addr = 2 * 1024;
 static int g_triggerbar_addr = 0;
 static int g_compression = COMPRESSION_NONE;
+static int g_thresh = 0x31; /* 1.5V */
 
 /* Maybe unk specifies an "endpoint" or "register" of sorts. */
 static int analyzer_write_status(libusb_device_handle *devh, unsigned char unk,
@@ -465,10 +466,10 @@ SR_PRIV void analyzer_configure(libusb_device_handle *devh)
 	__analyzer_set_trigger_count(devh, g_trigger_count);
 
 	/* Set_Trigger_Level */
-	gl_reg_write(devh, TRIGGER_LEVEL0, 0x31);
-	gl_reg_write(devh, TRIGGER_LEVEL1, 0x31);
-	gl_reg_write(devh, TRIGGER_LEVEL2, 0x31);
-	gl_reg_write(devh, TRIGGER_LEVEL3, 0x31);
+	gl_reg_write(devh, TRIGGER_LEVEL0, g_thresh);
+	gl_reg_write(devh, TRIGGER_LEVEL1, g_thresh);
+	gl_reg_write(devh, TRIGGER_LEVEL2, g_thresh);
+	gl_reg_write(devh, TRIGGER_LEVEL3, g_thresh);
 
 	/* Size of actual memory >> 2 */
 	__analyzer_set_ramsize_trigger_address(devh, g_ramsize_triggerbar_addr);
@@ -487,29 +488,43 @@ SR_PRIV void analyzer_configure(libusb_device_handle *devh)
 	__analyzer_set_compression(devh, g_compression);
 }
 
-SR_PRIV void analyzer_add_trigger(int channel, int type)
-{
-	switch (type) {
-	case TRIGGER_HIGH:
-		g_trigger_status[channel / 4] |= 1 << (channel % 4 * 2);
-		break;
-	case TRIGGER_LOW:
-		g_trigger_status[channel / 4] |= 2 << (channel % 4 * 2);
-		break;
-#if 0
-	case TRIGGER_POSEDGE:
-		g_trigger_status[8] = 0x40 | channel;
-		break;
-	case TRIGGER_NEGEDGE:
-		g_trigger_status[8] = 0x80 | channel;
-		break;
-	case TRIGGER_ANYEDGE:
-		g_trigger_status[8] = 0xc0 | channel;
-		break;
-#endif
-	default:
-		break;
+SR_PRIV int analyzer_add_triggers(const struct sr_dev_inst *sdi)
+{
+	struct dev_context *devc;
+	struct sr_trigger *trigger;
+	struct sr_trigger_stage *stage;
+	struct sr_trigger_match *match;
+	GSList *l, *m;
+	int channel;
+
+	devc = sdi->priv;
+
+	if (!(trigger = sr_session_trigger_get(sdi->session)))
+		return SR_OK;
+
+	for (l = trigger->stages; l; l = l->next) {
+		stage = l->data;
+		for (m = stage->matches; m; m = m->next) {
+			match = m->data;
+			devc->trigger = 1;
+			if (!match->channel->enabled)
+				/* Ignore disabled channels with a trigger. */
+				continue;
+			channel = match->channel->index;
+			switch (match->match) {
+			case SR_TRIGGER_ZERO:
+				g_trigger_status[channel / 4] |= 2 << (channel % 4 * 2);
+			case SR_TRIGGER_ONE:
+				g_trigger_status[channel / 4] |= 1 << (channel % 4 * 2);
+				break;
+			default:
+				sr_err("Unsupported match %d", match->match);
+				return SR_ERR;
+			}
+		}
 	}
+
+	return SR_OK;
 }
 
 SR_PRIV void analyzer_add_filter(int channel, int type)
@@ -564,11 +579,21 @@ SR_PRIV void analyzer_set_ramsize_trigger_address(unsigned int address)
 	g_ramsize_triggerbar_addr = address;
 }
 
+SR_PRIV unsigned int analyzer_get_ramsize_trigger_address(void)
+{
+	return g_ramsize_triggerbar_addr;
+}
+
 SR_PRIV void analyzer_set_triggerbar_address(unsigned int address)
 {
 	g_triggerbar_addr = address;
 }
 
+SR_PRIV unsigned int analyzer_get_triggerbar_address(void)
+{
+	return g_triggerbar_addr;
+}
+
 SR_PRIV unsigned int analyzer_read_status(libusb_device_handle *devh)
 {
 	return gl_reg_read(devh, DEV_STATUS);
@@ -602,6 +627,11 @@ SR_PRIV void analyzer_set_compression(unsigned int type)
 	g_compression = type;
 }
 
+SR_PRIV void analyzer_set_voltage_threshold(int thresh)
+{
+	g_thresh = thresh;
+}
+
 SR_PRIV void analyzer_wait_button(libusb_device_handle *devh)
 {
 	analyzer_wait(devh, STATUS_BUTTON_PRESSED, 0);