X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=hardware%2Frigol-ds%2Fprotocol.h;h=853fbe6e61e19a33a03f421664065cdb91b84012;hb=721fc2272ea1e7f3036eca570380bafe40146859;hp=cce22b28044f61bf7c1d463457d49761db083fb3;hpb=3086efdd73885820da142ce8c36053bbc3cf0e5f;p=libsigrok.git

diff --git a/hardware/rigol-ds/protocol.h b/hardware/rigol-ds/protocol.h
index cce22b28..853fbe6e 100644
--- a/hardware/rigol-ds/protocol.h
+++ b/hardware/rigol-ds/protocol.h
@@ -22,6 +22,7 @@
 #define LIBSIGROK_HARDWARE_RIGOL_DS_PROTOCOL_H
 
 #include <stdint.h>
+#include <stdbool.h>
 #include "libsigrok.h"
 #include "libsigrok-internal.h"
 
@@ -34,13 +35,66 @@
 #define sr_warn(s, args...) sr_warn(LOG_PREFIX s, ## args)
 #define sr_err(s, args...) sr_err(LOG_PREFIX s, ## args)
 
-#define ANALOG_WAVEFORM_SIZE 600
+#define DS1000_ANALOG_LIVE_WAVEFORM_SIZE 600
+#define DS2000_ANALOG_LIVE_WAVEFORM_SIZE 1400
+#define VS5000_ANALOG_LIVE_WAVEFORM_SIZE 2048
+/* Needs to be made configurable later */
+#define DS2000_ANALOG_MEM_WAVEFORM_SIZE_1C 14000
+#define DS2000_ANALOG_MEM_WAVEFORM_SIZE_2C 7000
 #define DIGITAL_WAVEFORM_SIZE 1210
+/* Size of acquisition buffers */
+#define ACQ_BUFFER_SIZE 32768
+
+enum rigol_ds_series {
+	RIGOL_DS1000,
+	RIGOL_DS1000Z,
+	RIGOL_DS2000,
+	RIGOL_DS4000,
+	RIGOL_DS6000,
+	RIGOL_VS5000,
+};
+
+enum rigol_protocol_flavor {
+	/* Used by DS1000 and VS5000 series */
+	PROTOCOL_LEGACY,
+	/* Used by DS2000, DS4000, DS6000, ... series */
+	PROTOCOL_IEEE488_2,
+};
+
+enum data_source {
+	DATA_SOURCE_LIVE,
+	DATA_SOURCE_MEMORY,
+	DATA_SOURCE_SEGMENTED,
+};
+
+struct rigol_ds_model {
+	char *name;
+	enum rigol_ds_series series;
+	enum rigol_protocol_flavor protocol;
+	uint64_t min_timebase[2];
+	uint64_t max_timebase[2];
+	uint64_t min_vdiv[2];
+	bool has_digital;
+	int num_horizontal_divs;
+};
+
+enum wait_events {
+	WAIT_NONE,    /* Don't wait */
+	WAIT_TRIGGER, /* Wait for trigger (only live capture) */
+	WAIT_BLOCK,   /* Wait for block data (only when reading sample mem) */
+	WAIT_STOP,    /* Wait for scope stopping (only single shots) */
+};
 
 /** Private, per-device-instance driver context. */
 struct dev_context {
-	/* Device features */
-	gboolean has_digital;
+	/* Device model */
+	const struct rigol_ds_model *model;
+
+	/* Device properties */
+	const uint64_t (*timebases)[2];
+	uint64_t num_timebases;
+	const uint64_t (*vdivs)[2];
+	uint64_t num_vdivs;
 
 	/* Probe groups */
 	struct sr_probe_group analog_groups[2];
@@ -51,12 +105,15 @@ struct dev_context {
 	GSList *enabled_digital_probes;
 	uint64_t limit_frames;
 	void *cb_data;
+	enum data_source data_source;
+	uint64_t analog_frame_size;
 
 	/* Device settings */
 	gboolean analog_channels[2];
 	gboolean digital_channels[16];
 	float timebase;
 	float vdiv[2];
+	int vert_reference[2];
 	float vert_offset[2];
 	char *trigger_source;
 	float horiz_triggerpos;
@@ -65,12 +122,24 @@ struct dev_context {
 
 	/* Operational state */
 	uint64_t num_frames;
+	/* FIXME: misnomer, actually this is number of frame samples? */
 	uint64_t num_frame_bytes;
 	struct sr_probe *channel_frame;
+	/* Number of bytes in current data block, if 0 block header expected */
+	uint64_t num_block_bytes;
+	/* Number of data block bytes already read */
+	uint64_t num_block_read;
+	/* What to wait for in *_receive */
+	enum wait_events wait_event;
+	/* Trigger/block copying/stop waiting status */
+	int wait_status;
+	/* Acq buffers used for reading from the scope and sending data to app */
+	unsigned char *buffer;
+	float *data;
 };
 
+SR_PRIV int rigol_ds_capture_start(const struct sr_dev_inst *sdi);
 SR_PRIV int rigol_ds_receive(int fd, int revents, void *cb_data);
-SR_PRIV int rigol_ds_send(const struct sr_dev_inst *sdi, const char *format, ...);
 SR_PRIV int rigol_ds_get_dev_cfg(const struct sr_dev_inst *sdi);
 
 #endif