X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=hardware%2Frigol-ds%2Fapi.c;h=99d718313fc50dd24dbed2f876872847fe469778;hb=c2b394d56220de371280ff6e2b83559e1b1d27b6;hp=6b92fa8de091ec5a943402fc6a8bd25f0a754abe;hpb=b4936bae0a4b2e8527324416faf81704e53216d2;p=libsigrok.git diff --git a/hardware/rigol-ds/api.c b/hardware/rigol-ds/api.c index 6b92fa8d..99d71831 100644 --- a/hardware/rigol-ds/api.c +++ b/hardware/rigol-ds/api.c @@ -40,6 +40,8 @@ static const int32_t hwcaps[] = { SR_CONF_TRIGGER_SLOPE, SR_CONF_HORIZ_TRIGGERPOS, SR_CONF_NUM_TIMEBASE, + SR_CONF_LIMIT_FRAMES, + SR_CONF_SAMPLERATE, }; static const int32_t analog_hwcaps[] = { @@ -117,6 +119,8 @@ static const uint64_t vdivs[][2] = { static const char *trigger_sources[] = { "CH1", "CH2", + "CH3", + "CH4", "EXT", "AC Line", "D0", @@ -154,26 +158,41 @@ static const char *data_sources[] = { * name, series, protocol flavor, min timebase, max timebase, min vdiv, * digital channels, number of horizontal divs */ + +#define RIGOL "Rigol Technologies" +#define AGILENT "Agilent Technologies" + static const struct rigol_ds_model supported_models[] = { - {"DS1052E", RIGOL_DS1000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, false, 12}, - {"DS1102E", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, false, 12}, - {"DS1152E", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, false, 12}, - {"DS1052D", RIGOL_DS1000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, true, 12}, - {"DS1102D", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, true, 12}, - {"DS1152D", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, true, 12}, - {"DS2072", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, false, 14}, - {"DS2102", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, false, 14}, - {"DS2202", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {500, 1}, {500, 1000000}, false, 14}, - {"VS5022", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, false, 14}, - {"VS5022D", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, true, 14}, - {"VS5042", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, false, 14}, - {"VS5042D", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, true, 14}, - {"VS5062", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, false, 14}, - {"VS5062D", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, true, 14}, - {"VS5102", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, false, 14}, - {"VS5102D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, true, 14}, - {"VS5202", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, false, 14}, - {"VS5202D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, true, 14}, + {RIGOL, "DS1052E", RIGOL_DS1000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {RIGOL, "DS1102E", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {RIGOL, "DS1152E", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {RIGOL, "DS1052D", RIGOL_DS1000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12}, + {RIGOL, "DS1102D", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12}, + {RIGOL, "DS1152D", RIGOL_DS1000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 12}, + {RIGOL, "DS2072", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2102", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2202", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {500, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2302", RIGOL_DS2000, PROTOCOL_IEEE488_2, {1, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2072A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2102A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {5, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2202A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {2, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "DS2302A", RIGOL_DS2000, PROTOCOL_IEEE488_2, {1, 1000000000}, {1000, 1}, {500, 1000000}, 2, false, 14}, + {RIGOL, "VS5022", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14}, + {RIGOL, "VS5022D", RIGOL_VS5000, PROTOCOL_LEGACY, {20, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14}, + {RIGOL, "VS5042", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14}, + {RIGOL, "VS5042D", RIGOL_VS5000, PROTOCOL_LEGACY, {10, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14}, + {RIGOL, "VS5062", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14}, + {RIGOL, "VS5062D", RIGOL_VS5000, PROTOCOL_LEGACY, {5, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14}, + {RIGOL, "VS5102", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14}, + {RIGOL, "VS5102D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14}, + {RIGOL, "VS5202", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 14}, + {RIGOL, "VS5202D", RIGOL_VS5000, PROTOCOL_LEGACY, {2, 1000000000}, {50, 1}, {2, 1000}, 2, true, 14}, + {AGILENT, "DSO1002A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {AGILENT, "DSO1004A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {5, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12}, + {AGILENT, "DSO1012A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {AGILENT, "DSO1014A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12}, + {AGILENT, "DSO1022A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 2, false, 12}, + {AGILENT, "DSO1024A", AGILENT_DSO1000, PROTOCOL_IEEE488_2, {2, 1000000000}, {50, 1}, {2, 1000}, 4, false, 12}, }; SR_PRIV struct sr_dev_driver rigol_ds_driver_info; @@ -229,9 +248,6 @@ static int probe_port(const char *resource, const char *serialcomm, GSList **dev { struct dev_context *devc; struct sr_dev_inst *sdi; - const char *usbtmc_prefix = "/dev/usbtmc"; - const char *tcp_prefix = "tcp/"; - gchar **tokens, *address, *port; struct sr_scpi_dev_inst *scpi; struct sr_scpi_hw_info *hw_info; struct sr_probe *probe; @@ -241,31 +257,11 @@ static int probe_port(const char *resource, const char *serialcomm, GSList **dev *devices = NULL; - if (strncmp(resource, usbtmc_prefix, strlen(usbtmc_prefix)) == 0) { - sr_dbg("Opening USBTMC device %s.", resource); - if (!(scpi = scpi_usbtmc_dev_inst_new(resource))) - return SR_ERR_MALLOC; - } else if (strncmp(resource, tcp_prefix, strlen(tcp_prefix)) == 0) { - sr_dbg("Opening TCP connection %s.", resource); - tokens = g_strsplit(resource + strlen(tcp_prefix), "/", 0); - address = tokens[0]; - port = tokens[1]; - if (!address || !port || tokens[2]) { - sr_err("Invalid parameters."); - g_strfreev(tokens); - return SR_ERR_ARG; - } - scpi = scpi_tcp_dev_inst_new(address, port); - g_strfreev(tokens); - if (!scpi) - return SR_ERR_MALLOC; - } else { - sr_dbg("Opening serial device %s.", resource); - if (!(scpi = scpi_serial_dev_inst_new(resource, serialcomm))) - return SR_ERR_MALLOC; - } + if (!(scpi = scpi_dev_inst_new(resource, serialcomm))) + return SR_ERR; if (sr_scpi_open(scpi) != SR_OK) { + sr_info("Couldn't open SCPI device."); sr_scpi_free(scpi); return SR_ERR; }; @@ -277,15 +273,9 @@ static int probe_port(const char *resource, const char *serialcomm, GSList **dev return SR_ERR; } - if (strcasecmp(hw_info->manufacturer, "Rigol Technologies")) { - sr_scpi_hw_info_free(hw_info); - sr_scpi_close(scpi); - sr_scpi_free(scpi); - return SR_ERR_NA; - } - for (i = 0; i < ARRAY_SIZE(supported_models); i++) { - if (!strcmp(hw_info->model, supported_models[i].name)) { + if (!strcasecmp(hw_info->manufacturer, supported_models[i].vendor) && + !strcmp(hw_info->model, supported_models[i].name)) { model = &supported_models[i]; break; } @@ -314,10 +304,10 @@ static int probe_port(const char *resource, const char *serialcomm, GSList **dev devc->limit_frames = 0; devc->model = model; - for (i = 0; i < 2; i++) { - channel_name = (i == 0 ? "CH1" : "CH2"); - if (!(probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE, channel_name))) + for (i = 0; i < model->analog_channels; i++) { + if (!(channel_name = g_strdup_printf("CH%d", i + 1))) return SR_ERR_MALLOC; + probe = sr_probe_new(i, SR_PROBE_ANALOG, TRUE, channel_name); sdi->probes = g_slist_append(sdi->probes, probe); devc->analog_groups[i].name = channel_name; devc->analog_groups[i].probes = g_slist_append(NULL, probe); @@ -349,12 +339,9 @@ static int probe_port(const char *resource, const char *serialcomm, GSList **dev devc->num_timebases = &timebases[i] - devc->timebases + 1; } - for (i = 0; i < NUM_VDIV; i++) { - if (!memcmp(&devc->model->min_vdiv, &vdivs[i], sizeof(uint64_t[2]))) { + for (i = 0; i < NUM_VDIV; i++) + if (!memcmp(&devc->model->min_vdiv, &vdivs[i], sizeof(uint64_t[2]))) devc->vdivs = &vdivs[i]; - devc->num_vdivs = NUM_VDIV - (&vdivs[i] - &vdivs[0]); - } - } if (!(devc->buffer = g_try_malloc(ACQ_BUFFER_SIZE))) return SR_ERR_MALLOC; @@ -470,40 +457,59 @@ static int cleanup(void) return dev_clear(); } +static int analog_frame_size(const struct sr_dev_inst *sdi) +{ + struct dev_context *devc = sdi->priv; + struct sr_probe *probe; + int analog_probes = 0; + GSList *l; + + if (devc->model->protocol == PROTOCOL_LEGACY) { + if (devc->model->series == RIGOL_VS5000) + return VS5000_ANALOG_LIVE_WAVEFORM_SIZE; + else + return DS1000_ANALOG_LIVE_WAVEFORM_SIZE; + } else { + for (l = sdi->probes; l; l = l->next) { + probe = l->data; + if (probe->type == SR_PROBE_ANALOG && probe->enabled) + analog_probes++; + } + if (devc->data_source == DATA_SOURCE_MEMORY) { + if (analog_probes == 1) + return DS2000_ANALOG_MEM_WAVEFORM_SIZE_1C; + else + return DS2000_ANALOG_MEM_WAVEFORM_SIZE_2C; + } else { + if (devc->model->series == AGILENT_DSO1000) + return DSO1000_ANALOG_LIVE_WAVEFORM_SIZE; + else + return DS2000_ANALOG_LIVE_WAVEFORM_SIZE; + } + } +} + static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi, const struct sr_probe_group *probe_group) { struct dev_context *devc; - unsigned int i; + uint64_t samplerate; if (!sdi || !(devc = sdi->priv)) return SR_ERR_ARG; /* If a probe group is specified, it must be a valid one. */ - if (probe_group) { - if (probe_group != &devc->analog_groups[0] - && probe_group != &devc->analog_groups[1]) { - sr_err("Invalid probe group specified."); - return SR_ERR; - } + if (probe_group && !g_slist_find(sdi->probe_groups, probe_group)) { + sr_err("Invalid probe group specified."); + return SR_ERR; } switch (id) { case SR_CONF_NUM_TIMEBASE: - *data = g_variant_new_int32(devc->num_timebases); + *data = g_variant_new_int32(devc->model->num_horizontal_divs); break; case SR_CONF_NUM_VDIV: - if (!probe_group) { - sr_err("No probe group specified."); - return SR_ERR_PROBE_GROUP; - } - for (i = 0; i < 2; i++) { - if (probe_group == &devc->analog_groups[i]) { - *data = g_variant_new_int32(devc->num_vdivs); - return SR_OK; - } - } - return SR_ERR_NA; + *data = g_variant_new_int32(8); case SR_CONF_DATA_SOURCE: if (devc->data_source == DATA_SOURCE_LIVE) *data = g_variant_new_string("Live"); @@ -512,6 +518,15 @@ static int config_get(int id, GVariant **data, const struct sr_dev_inst *sdi, else *data = g_variant_new_string("Segmented"); break; + case SR_CONF_SAMPLERATE: + if (devc->data_source == DATA_SOURCE_LIVE) { + samplerate = analog_frame_size(sdi) / + (devc->timebase * devc->model->num_horizontal_divs); + *data = g_variant_new_uint64(samplerate); + } else { + return SR_ERR_NA; + } + break; default: return SR_ERR_NA; } @@ -536,12 +551,9 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, return SR_ERR_DEV_CLOSED; /* If a probe group is specified, it must be a valid one. */ - if (probe_group) { - if (probe_group != &devc->analog_groups[0] - && probe_group != &devc->analog_groups[1]) { - sr_err("Invalid probe group specified."); - return SR_ERR; - } + if (probe_group && !g_slist_find(sdi->probe_groups, probe_group)) { + sr_err("Invalid probe group specified."); + return SR_ERR; } ret = SR_OK; @@ -591,6 +603,10 @@ static int config_set(int id, GVariant *data, const struct sr_dev_inst *sdi, tmp_str = "CHAN1"; else if (!strcmp(devc->trigger_source, "CH2")) tmp_str = "CHAN2"; + else if (!strcmp(devc->trigger_source, "CH3")) + tmp_str = "CHAN3"; + else if (!strcmp(devc->trigger_source, "CH4")) + tmp_str = "CHAN4"; else tmp_str = (char *)devc->trigger_source; ret = set_cfg(sdi, ":TRIG:EDGE:SOUR %s", tmp_str); @@ -694,7 +710,6 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi, } switch (key) { - break; case SR_CONF_DEVICE_OPTIONS: if (!probe_group) { sr_err("No probe group specified."); @@ -731,7 +746,7 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi, return SR_ERR_PROBE_GROUP; } g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY); - for (i = 0; i < devc->num_vdivs; i++) { + for (i = 0; i < NUM_VDIV; i++) { rational[0] = g_variant_new_uint64(devc->vdivs[i][0]); rational[1] = g_variant_new_uint64(devc->vdivs[i][1]); tuple = g_variant_new_tuple(rational, 2); @@ -743,6 +758,8 @@ static int config_list(int key, GVariant **data, const struct sr_dev_inst *sdi, if (!devc) /* Can't know this until we have the exact model. */ return SR_ERR_ARG; + if (devc->num_timebases <= 0) + return SR_ERR_NA; g_variant_builder_init(&gvb, G_VARIANT_TYPE_ARRAY); for (i = 0; i < devc->num_timebases; i++) { rational[0] = g_variant_new_uint64(devc->timebases[i][0]); @@ -782,7 +799,6 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data) struct dev_context *devc; struct sr_probe *probe; GSList *l; - char cmd[256]; if (sdi->status != SR_ST_ACTIVE) return SR_ERR_DEV_CLOSED; @@ -790,18 +806,7 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data) scpi = sdi->conn; devc = sdi->priv; - if (devc->data_source == DATA_SOURCE_LIVE) { - if (sr_scpi_send(sdi->conn, ":RUN") != SR_OK) - return SR_ERR; - } else if (devc->data_source == DATA_SOURCE_MEMORY) { - if (devc->model->series != RIGOL_DS2000) { - sr_err("Data source 'Memory' not supported for this device"); - return SR_ERR; - } - } else if (devc->data_source == DATA_SOURCE_SEGMENTED) { - sr_err("Data source 'Segmented' not yet supported"); - return SR_ERR; - } + devc->num_frames = 0; for (l = sdi->probes; l; l = l->next) { probe = l->data; @@ -812,67 +817,80 @@ static int dev_acquisition_start(const struct sr_dev_inst *sdi, void *cb_data) devc->enabled_analog_probes, probe); if (probe->enabled != devc->analog_channels[probe->index]) { /* Enabled channel is currently disabled, or vice versa. */ - sprintf(cmd, ":CHAN%d:DISP %s", probe->index + 1, - probe->enabled ? "ON" : "OFF"); - if (sr_scpi_send(sdi->conn, cmd) != SR_OK) + if (set_cfg(sdi, ":CHAN%d:DISP %s", probe->index + 1, + probe->enabled ? "ON" : "OFF") != SR_OK) return SR_ERR; } } else if (probe->type == SR_PROBE_LOGIC) { - if (probe->enabled) + if (probe->enabled) { devc->enabled_digital_probes = g_slist_append( devc->enabled_digital_probes, probe); + /* Turn on LA module if currently off. */ + if (!devc->la_enabled) { + if (set_cfg(sdi, ":LA:DISP ON") != SR_OK) + return SR_ERR; + devc->la_enabled = TRUE; + } + } if (probe->enabled != devc->digital_channels[probe->index]) { /* Enabled channel is currently disabled, or vice versa. */ - sprintf(cmd, ":DIG%d:TURN %s", probe->index, - probe->enabled ? "ON" : "OFF"); - if (sr_scpi_send(sdi->conn, cmd) != SR_OK) + if (set_cfg(sdi, ":DIG%d:TURN %s", probe->index, + probe->enabled ? "ON" : "OFF") != SR_OK) return SR_ERR; } } } + if (!devc->enabled_analog_probes && !devc->enabled_digital_probes) return SR_ERR; + /* Turn off LA module if on and no digital probes selected. */ + if (devc->la_enabled && !devc->enabled_digital_probes) + if (set_cfg(sdi, ":LA:DISP OFF") != SR_OK) + return SR_ERR; + + if (devc->data_source == DATA_SOURCE_LIVE) { + if (set_cfg(sdi, ":RUN") != SR_OK) + return SR_ERR; + } else if (devc->data_source == DATA_SOURCE_MEMORY) { + if (devc->model->series != RIGOL_DS2000) { + sr_err("Data source 'Memory' not supported for this device"); + return SR_ERR; + } + } else if (devc->data_source == DATA_SOURCE_SEGMENTED) { + sr_err("Data source 'Segmented' not yet supported"); + return SR_ERR; + } + sr_scpi_source_add(scpi, G_IO_IN, 50, rigol_ds_receive, (void *)sdi); /* Send header packet to the session bus. */ std_session_send_df_header(cb_data, LOG_PREFIX); + if (devc->enabled_analog_probes) + devc->channel_entry = devc->enabled_analog_probes; + else + devc->channel_entry = devc->enabled_digital_probes; + + devc->analog_frame_size = analog_frame_size(sdi); + if (devc->model->protocol == PROTOCOL_LEGACY) { /* Fetch the first frame. */ - if (devc->enabled_analog_probes) { - devc->analog_frame_size = DS1000_ANALOG_LIVE_WAVEFORM_SIZE; - devc->channel_frame = devc->enabled_analog_probes->data; - if (sr_scpi_send(sdi->conn, ":WAV:DATA? CHAN%d", - devc->channel_frame->index + 1) != SR_OK) - return SR_ERR; - } else { - devc->channel_frame = devc->enabled_digital_probes->data; - if (sr_scpi_send(sdi->conn, ":WAV:DATA? DIG") != SR_OK) - return SR_ERR; - } - - devc->num_frame_bytes = 0; + if (rigol_ds_channel_start(sdi) != SR_OK) + return SR_ERR; } else { if (devc->enabled_analog_probes) { - if (devc->data_source == DATA_SOURCE_MEMORY) - { - if (g_slist_length(devc->enabled_analog_probes) == 1) - devc->analog_frame_size = DS2000_ANALOG_MEM_WAVEFORM_SIZE_1C; - else - devc->analog_frame_size = DS2000_ANALOG_MEM_WAVEFORM_SIZE_2C; + if (devc->data_source == DATA_SOURCE_MEMORY) { /* Apparently for the DS2000 the memory * depth can only be set in Running state - * this matches the behaviour of the UI. */ - if (sr_scpi_send(sdi->conn, ":RUN") != SR_OK) + if (set_cfg(sdi, ":RUN") != SR_OK) return SR_ERR; - if (sr_scpi_send(sdi->conn, "ACQ:MDEP %d", devc->analog_frame_size) != SR_OK) + if (set_cfg(sdi, "ACQ:MDEP %d", devc->analog_frame_size) != SR_OK) return SR_ERR; - if (sr_scpi_send(sdi->conn, ":STOP") != SR_OK) + if (set_cfg(sdi, ":STOP") != SR_OK) return SR_ERR; - } else - devc->analog_frame_size = DS2000_ANALOG_LIVE_WAVEFORM_SIZE; - devc->channel_frame = devc->enabled_analog_probes->data; + } if (rigol_ds_capture_start(sdi) != SR_OK) return SR_ERR; } @@ -885,6 +903,7 @@ static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data) { struct dev_context *devc; struct sr_scpi_dev_inst *scpi; + struct sr_datafeed_packet packet; (void)cb_data; @@ -895,6 +914,10 @@ static int dev_acquisition_stop(struct sr_dev_inst *sdi, void *cb_data) return SR_ERR; } + /* End of last frame. */ + packet.type = SR_DF_END; + sr_session_send(sdi, &packet); + g_slist_free(devc->enabled_analog_probes); g_slist_free(devc->enabled_digital_probes); devc->enabled_analog_probes = NULL;