X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=hantek_6022bl.c;h=d1ff045eae2f2412f4256c112c501eb2427f343f;hb=d67ced51c6900f948c5e1ff13d30d6aa90cb1300;hp=2e86a2ac583ba37988fee70952f54e4490abb91e;hpb=cbd1bc65eeeae1c9a21970395941c77654fd32f0;p=sigrok-firmware-fx2lafw.git

diff --git a/hantek_6022bl.c b/hantek_6022bl.c
index 2e86a2ac..d1ff045e 100644
--- a/hantek_6022bl.c
+++ b/hantek_6022bl.c
@@ -81,8 +81,8 @@ void timer2_isr(void) __interrupt TF2_ISR
 
 /*
  * This sets three bits for each channel, one channel at a time.
- * For channel 0 we want to set bits 5, 6 & 7
- * For channel 1 we want to set bits 2, 3 & 4
+ * For channel 0 we want to set bits 1, 2 & 3
+ * For channel 1 we want to set bits 4, 5 & 6
  *
  * We convert the input values that are strange due to original
  * firmware code into the value of the three bits as follows:
@@ -106,23 +106,24 @@ static BOOL set_voltage(BYTE channel, BYTE val)
 
 	switch (val) {
 	case 1:
-		bits = 0x24 * 2;
+		bits = 0x02;
 		break;
 	case 2:
-		bits = 0x24 * 1;
+		bits = 0x01;
 		break;
 	case 5:
-		bits = 0x24 * 0;
+		bits = 0x00;
 		break;
 	case 10:
-		bits = 0x24 * 3;
+		bits = 0x03;
 		break;
 	default:
 		return FALSE;
 	}
 
-	mask = (channel) ? 0xe0 : 0x1c;
-	IOC = (IOC & ~mask) | (bits & mask);
+	bits = bits << (channel ? 1 : 4);
+	mask = (channel) ? 0x70 : 0x0e;
+	IOA = (IOA & ~mask) | (bits & mask);
 
 	return TRUE;
 }
@@ -163,6 +164,9 @@ static void start_sampling(void)
 {
 	int i;
 
+	/* Set analog mode. */
+	PA7 = 1;
+
 	clear_fifo();
 
 	for (i = 0; i < 1000; i++);
@@ -219,16 +223,16 @@ static const struct samplerate_info {
 } samplerates[] = {
 	{ 48, 0x80,   0, 3, 0, 0x00, 0xea },
 	{ 30, 0x80,   0, 3, 0, 0x00, 0xaa },
-	{ 24,    1,   0, 2, 1, 0x40, 0xca },
-	{ 16,    1,   1, 2, 0, 0x40, 0xca },
-	{ 12,    2,   1, 2, 0, 0x40, 0xca },
-	{  8,    3,   2, 2, 0, 0x40, 0xca },
-	{  4,    6,   5, 2, 0, 0x40, 0xca },
-	{  2,   12,  11, 2, 0, 0x40, 0xca },
-	{  1,   24,  23, 2, 0, 0x40, 0xca },
-	{ 50,   48,  47, 2, 0, 0x40, 0xca },
-	{ 20,  120, 119, 2, 0, 0x40, 0xca },
-	{ 10,  240, 239, 2, 0, 0x40, 0xca },
+	{ 24,    1,   0, 2, 1, 0x10, 0xca },
+	{ 16,    1,   1, 2, 0, 0x10, 0xca },
+	{ 12,    2,   1, 2, 0, 0x10, 0xca },
+	{  8,    3,   2, 2, 0, 0x10, 0xca },
+	{  4,    6,   5, 2, 0, 0x10, 0xca },
+	{  2,   12,  11, 2, 0, 0x10, 0xca },
+	{  1,   24,  23, 2, 0, 0x10, 0xca },
+	{ 50,   48,  47, 2, 0, 0x10, 0xca },
+	{ 20,  120, 119, 2, 0, 0x10, 0xca },
+	{ 10,  240, 239, 2, 0, 0x10, 0xca },
 };
 
 static BOOL set_samplerate(BYTE rate)
@@ -283,8 +287,8 @@ static BOOL set_samplerate(BYTE rate)
 
 	/* OUTPUT 0-7 */
 	EXTAUTODAT2 = samplerates[i].out0;
-	EXTAUTODAT2 = 0x44; /* OE0=1, CTL0=1 */
-	EXTAUTODAT2 = 0x44; /* OE0=1, CTL0=1 */
+	EXTAUTODAT2 = 0x11; /* OE0=1, CTL0=1 */
+	EXTAUTODAT2 = 0x11; /* OE0=1, CTL0=1 */
 	EXTAUTODAT2 = 0;
 	EXTAUTODAT2 = 0;
 	EXTAUTODAT2 = 0;
@@ -386,6 +390,9 @@ static void init(void)
 	EP4CFG = 0;
 	EP8CFG = 0;
 
+	/* Set analog mode. */
+	PA7 = 1;
+
 	/* In idle mode tristate all outputs. */
 	GPIFIDLECTL = 0x00; /* Don't enable CTL0-5 outputs. */
 	GPIFCTLCFG = 0x80; /* TRICTL=1. CTL0-2: CMOS outputs, tri-statable. */
@@ -432,7 +439,7 @@ static void main(void)
 	PORTCCFG = 0;
 	PORTACFG = 0;
 	OEC = 0xff;
-	OEA = 0x80;
+	OEA = 0xff;
 
 	while (TRUE) {
 		if (dosud) {