X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=gpif-acquisition.c;h=7d3dcb6d59d8c1c69048ce7b3efbca98d80e5d21;hb=HEAD;hp=d8092c7d3727dbd4a1429a36f431ef246c85eaa3;hpb=fb08a72db5979d9b34e3f1bb59dd32aceb9bf32d;p=sigrok-firmware-fx2lafw.git diff --git a/gpif-acquisition.c b/gpif-acquisition.c index d8092c7d..c6ba52a0 100644 --- a/gpif-acquisition.c +++ b/gpif-acquisition.c @@ -1,5 +1,5 @@ /* - * This file is part of the fx2lafw project. + * This file is part of the sigrok-firmware-fx2lafw project. * * Copyright (C) 2011-2012 Uwe Hermann * Copyright (C) 2012 Joel Holdsworth @@ -15,8 +15,7 @@ * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * along with this program; if not, see . */ #include @@ -27,7 +26,7 @@ #include #include -bit gpif_acquiring; +enum gpif_status gpif_acquiring = STOPPED; static void gpif_reset_waveforms(void) { @@ -46,15 +45,12 @@ static void gpif_setup_registers(void) /* TODO. Value probably irrelevant, as we don't use RDY* signals? */ GPIFREADYCFG = 0; - /* - * Set TRICTL = 0, thus CTL0-CTL5 are CMOS outputs. - * TODO: Probably irrelevant, as we don't use CTL0-CTL5? - */ + /* Set TRICTL = 0, thus CTL0-CTL5 are CMOS outputs. */ GPIFCTLCFG = 0; /* When GPIF is idle, tri-state the data bus. */ /* Bit 7: DONE, bit 0: IDLEDRV. TODO: Set/clear DONE bit? */ - GPIFIDLECS = (1 << 0); + GPIFIDLECS = (0 << 0); /* When GPIF is idle, set CTL0-CTL5 to 0. */ GPIFIDLECTL = 0; @@ -66,12 +62,12 @@ static void gpif_setup_registers(void) * GPIFWFSELECT: [7:6] = SINGLEWR index, [5:4] = SINGLERD index, * [3:2] = FIFOWR index, [1:0] = FIFORD index */ - GPIFWFSELECT = (0x3 << 6) | (0x2 << 4) | (0x1 << 2) | (0x0 << 0); + GPIFWFSELECT = (0x3u << 6) | (0x2u << 4) | (0x1u << 2) | (0x0u << 0); /* Contains RDY* pin values. Read-only according to TRM. */ GPIFREADYSTAT = 0; - /* Make GPIF stop on transcation count not flag */ + /* Make GPIF stop on transaction count not flag. */ EP2GPIFPFSTOP = (0 << 0); } @@ -128,11 +124,11 @@ void gpif_init_la(void) /* Initialize flowstate registers (not used by us). */ gpif_init_flowstates(); - /* Reset the status */ - gpif_acquiring = FALSE; + /* Reset the status. */ + gpif_acquiring = STOPPED; } -static void gpif_make_delay_state(volatile BYTE *pSTATE, uint8_t delay) +static void gpif_make_delay_state(volatile BYTE *pSTATE, uint8_t delay, uint8_t output) { /* * DELAY @@ -143,15 +139,14 @@ static void gpif_make_delay_state(volatile BYTE *pSTATE, uint8_t delay) /* * OPCODE * SGL=0, GIN=0, INCAD=0, NEXT=0, DATA=0, DP=0 - * Collect data in this state. */ - pSTATE[8] = 0x00; + pSTATE[8] = 0; /* * OUTPUT - * OE[0:3]=0, CTL[0:3]=0 + * CTL[0:5]=output */ - pSTATE[16] = 0x00; + pSTATE[16] = output; /* * LOGIC FUNCTION @@ -160,13 +155,13 @@ static void gpif_make_delay_state(volatile BYTE *pSTATE, uint8_t delay) pSTATE[24] = 0x00; } -static void gpid_make_data_dp_state(volatile BYTE *pSTATE) +static void gpif_make_data_dp_state(volatile BYTE *pSTATE) { /* * BRANCH * Branch to IDLE if condition is true, back to S0 otherwise. */ - pSTATE[0] = (7 << 3) | (0 << 0); + pSTATE[0] = (1u << 7) | (7u << 3) | (0u << 0); /* * OPCODE @@ -176,7 +171,7 @@ static void gpid_make_data_dp_state(volatile BYTE *pSTATE) /* * OUTPUT - * OE[0:3]=0, CTL[0:3]=0 + * CTL[0:5]=0 */ pSTATE[16] = 0x00; @@ -188,7 +183,7 @@ static void gpid_make_data_dp_state(volatile BYTE *pSTATE) pSTATE[24] = (6 << 3) | (6 << 0); } -bool gpif_acquisition_start(const struct cmd_start_acquisition *cmd) +bool gpif_acquisition_prepare(const struct cmd_start_acquisition *cmd) { int i; volatile BYTE *pSTATE = &GPIF_WAVE_DATA; @@ -196,6 +191,13 @@ bool gpif_acquisition_start(const struct cmd_start_acquisition *cmd) /* Ensure GPIF is idle before reconfiguration. */ while (!(GPIFTRIG & 0x80)); + /* Configure the EP2 FIFO. */ + if (cmd->flags & CMD_START_FLAGS_SAMPLE_16BIT) + EP2FIFOCFG = bmAUTOIN | bmWORDWIDE; + else + EP2FIFOCFG = bmAUTOIN; + SYNCDELAY(); + /* Set IFCONFIG to the correct clock source. */ if (cmd->flags & CMD_START_FLAGS_CLK_48MHZ) { IFCONFIG = bmIFCLKSRC | bm3048MHZ | bmIFCLKOE | bmASYNC | @@ -205,20 +207,44 @@ bool gpif_acquisition_start(const struct cmd_start_acquisition *cmd) bmGSTATE | bmIFGPIF; } - /* Populate delay states */ - if((cmd->sample_delay_h == 0 && cmd->sample_delay_l == 0) || - cmd->sample_delay_h >= 6) + /* Populate delay states. */ + if (cmd->sample_delay_h >= 6) return false; - for(i = 0; i < cmd->sample_delay_h; i++) - gpif_make_delay_state(pSTATE++, 0); + if (cmd->flags & CMD_START_FLAGS_CLK_CTL2) { + uint8_t delay_1, delay_2 = cmd->sample_delay_l; + + /* We need a pulse where the CTL1/2 pins alternate states. */ + if (cmd->sample_delay_h) { + for (i = 0; i < cmd->sample_delay_h; i++) + gpif_make_delay_state(pSTATE++, 0, 0x06); + } else { + delay_1 = delay_2 / 2; + delay_2 -= delay_1; + gpif_make_delay_state(pSTATE++, delay_1, 0x06); + } + + /* sample_delay_l is always != 0 for the supported rates. */ + gpif_make_delay_state(pSTATE++, delay_2, 0x00); + } else { + for (i = 0; i < cmd->sample_delay_h; i++) + gpif_make_delay_state(pSTATE++, 0, 0x00); - if(cmd->sample_delay_l != 0) - gpif_make_delay_state(pSTATE++, cmd->sample_delay_l); + if (cmd->sample_delay_l != 0) + gpif_make_delay_state(pSTATE++, cmd->sample_delay_l, 0x00); + } /* Populate S1 - the decision point. */ - gpid_make_data_dp_state(pSTATE++); + gpif_make_data_dp_state(pSTATE++); + /* Update the status. */ + gpif_acquiring = PREPARED; + + return true; +} + +void gpif_acquisition_start(void) +{ /* Execute the whole GPIF waveform once. */ gpif_set_tc16(1); @@ -226,15 +252,13 @@ bool gpif_acquisition_start(const struct cmd_start_acquisition *cmd) gpif_fifo_read(GPIF_EP2); /* Update the status. */ - gpif_acquiring = TRUE; - - return true; + gpif_acquiring = RUNNING; } void gpif_poll(void) { /* Detect if acquisition has completed. */ - if (gpif_acquiring && (GPIFTRIG & 0x80)) { + if ((gpif_acquiring == RUNNING) && (GPIFTRIG & 0x80)) { /* Activate NAK-ALL to avoid race conditions. */ FIFORESET = 0x80; SYNCDELAY(); @@ -255,6 +279,6 @@ void gpif_poll(void) FIFORESET = 0x00; SYNCDELAY(); - gpif_acquiring = FALSE; + gpif_acquiring = STOPPED; } }