X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=gpif-acquisition.c;h=17a87b9e968a0bd91324f4073da0fed95e44ddf2;hb=823ff1e02ab3d100c1ef0d0fe3bbcc6b05aba446;hp=4878b513937a98b6f7d5ad4517df8ecfc03e7e00;hpb=8819f75c56450ef49739c3e968d70c7c777d9161;p=sigrok-firmware-fx2lafw.git

diff --git a/gpif-acquisition.c b/gpif-acquisition.c
index 4878b513..17a87b9e 100644
--- a/gpif-acquisition.c
+++ b/gpif-acquisition.c
@@ -1,5 +1,5 @@
 /*
- * This file is part of the fx2lafw project.
+ * This file is part of the sigrok-firmware-fx2lafw project.
  *
  * Copyright (C) 2011-2012 Uwe Hermann <uwe@hermann-uwe.de>
  * Copyright (C) 2012 Joel Holdsworth <joel@airwebreathe.org.uk>
@@ -54,7 +54,7 @@ static void gpif_setup_registers(void)
 
 	/* When GPIF is idle, tri-state the data bus. */
 	/* Bit 7: DONE, bit 0: IDLEDRV. TODO: Set/clear DONE bit? */
-	GPIFIDLECS = (1 << 0);
+	GPIFIDLECS = (0 << 0);
 
 	/* When GPIF is idle, set CTL0-CTL5 to 0. */
 	GPIFIDLECTL = 0;
@@ -71,7 +71,7 @@ static void gpif_setup_registers(void)
 	/* Contains RDY* pin values. Read-only according to TRM. */
 	GPIFREADYSTAT = 0;
 
-	/* Make GPIF stop on transcation count not flag */
+	/* Make GPIF stop on transaction count not flag. */
 	EP2GPIFPFSTOP = (0 << 0);
 }
 
@@ -128,11 +128,11 @@ void gpif_init_la(void)
 	/* Initialize flowstate registers (not used by us). */
 	gpif_init_flowstates();
 
-	/* Reset the status */
+	/* Reset the status. */
 	gpif_acquiring = FALSE;
 }
 
-static void gpif_make_delay_state(volatile BYTE *pSTATE, uint8_t delay)
+static void gpif_make_delay_state(volatile BYTE *pSTATE, uint8_t delay, uint8_t opcode, uint8_t output)
 {
 	/*
 	 * DELAY
@@ -145,13 +145,13 @@ static void gpif_make_delay_state(volatile BYTE *pSTATE, uint8_t delay)
 	 * SGL=0, GIN=0, INCAD=0, NEXT=0, DATA=0, DP=0
 	 * Collect data in this state.
 	 */
-	pSTATE[8] = 0x00;
+	pSTATE[8] = opcode;
 
 	/*
 	 * OUTPUT
 	 * OE[0:3]=0, CTL[0:3]=0
 	 */
-	pSTATE[16] = 0x00;
+	pSTATE[16] = output;
 
 	/*
 	 * LOGIC FUNCTION
@@ -213,16 +213,32 @@ bool gpif_acquisition_start(const struct cmd_start_acquisition *cmd)
 			   bmGSTATE | bmIFGPIF;
 	}
 
-	/* Populate delay states. */
-	if ((cmd->sample_delay_h == 0 && cmd->sample_delay_l == 0) ||
-	    cmd->sample_delay_h >= 6)
-		return false;
+	if (cmd->flags & CMD_START_FLAGS_CLK_CTL2) {
+		uint8_t delay_1, delay_2;
+
+		/* We need a pulse where the CTL2 pin alternates states. */
+
+		/* Make the low pulse shorter then the high pulse. */
+		delay_2 = cmd->sample_delay_l >> 2;
+		/* Work around >12MHz case resulting in a 0 delay low pulse. */
+		if (delay_2 == 0)
+			delay_2 = 1;
+		delay_1 = cmd->sample_delay_l - delay_2;
 
-	for (i = 0; i < cmd->sample_delay_h; i++)
-		gpif_make_delay_state(pSTATE++, 0);
+		gpif_make_delay_state(pSTATE++, delay_2, 0x00, 0x40);
+		gpif_make_delay_state(pSTATE++, delay_1, 0x00, 0x46);
+	} else {
+		/* Populate delay states. */
+		if ((cmd->sample_delay_h == 0 && cmd->sample_delay_l == 0) ||
+			cmd->sample_delay_h >= 6)
+			return false;
+
+		for (i = 0; i < cmd->sample_delay_h; i++)
+			gpif_make_delay_state(pSTATE++, 0, 0x00, 0x00);
 
-	if (cmd->sample_delay_l != 0)
-		gpif_make_delay_state(pSTATE++, cmd->sample_delay_l);
+		if (cmd->sample_delay_l != 0)
+			gpif_make_delay_state(pSTATE++, cmd->sample_delay_l, 0x00, 0x00);
+	}
 
 	/* Populate S1 - the decision point. */
 	gpid_make_data_dp_state(pSTATE++);