X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=fx2lafw.c;h=1949a7c1fecfd46769cab5ff86947a3b9e6dac26;hb=b48a78c1beb65f7ea2e3ae8bfe33859ead122d86;hp=6af439900fb3bd304ea2178c20abd82523cdf4e3;hpb=64d4773073e3b40c7c4a4eef609df959fa7591c9;p=sigrok-firmware-fx2lafw.git diff --git a/fx2lafw.c b/fx2lafw.c index 6af43990..1949a7c1 100644 --- a/fx2lafw.c +++ b/fx2lafw.c @@ -1,5 +1,5 @@ /* - * This file is part of the fx2lafw project. + * This file is part of the sigrok-firmware-fx2lafw project. * * Copyright (C) 2011-2012 Uwe Hermann * @@ -14,8 +14,7 @@ * GNU General Public License for more details. * * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * along with this program; if not, see . */ /* @@ -28,10 +27,9 @@ * * - We use the FX2 in GPIF mode to sample the data (asynchronously). * - We use the internal 48MHz clock for GPIF. - * - The 8 channels/pins we sample (the GPIF data bus) are PB0-PB7. - * Support for 16 channels is not yet included, but might be added later. - * - Endpoint 2 is used for data transfers from FX2 to host. - * - The endpoint is quad-buffered. + * - The 8 channels/pins we sample (the GPIF data bus) are PB0-PB7, + * or PB0-PB7 + PD0-PD7 for 16-channel sampling. + * - Endpoint 2 (quad-buffered) is used for data transfers from FX2 to host. * * Documentation: * @@ -40,17 +38,22 @@ #include #include +#include #include #include #include #include - #include #include #include /* ... */ -volatile bit got_sud; +volatile __bit got_sud; +BYTE vendor_command; + +volatile WORD ledcounter = 1000; + +extern __bit gpif_acquiring; static void setup_endpoints(void) { @@ -58,44 +61,29 @@ static void setup_endpoints(void) EP2CFG = (1 << 7) | /* EP is valid/activated */ (1 << 6) | /* EP direction: IN */ (1 << 5) | (0 << 4) | /* EP Type: bulk */ - (0 << 3) | /* EP buffer size: 512 */ + (1 << 3) | /* EP buffer size: 1024 */ (0 << 2) | /* Reserved. */ (0 << 1) | (0 << 0); /* EP buffering: quad buffering */ SYNCDELAY(); - /* Setup EP6 (IN) in the debug build. */ -#ifdef DEBUG - EP6CFG = (1 << 7) | /* EP is valid/activated */ - (1 << 6) | /* EP direction: IN */ - (1 << 5) | (0 << 4) | /* EP Type: bulk */ - (0 << 3) | /* EP buffer size: 512 */ - (0 << 2) | /* Reserved */ - (1 << 1) | (0 << 0); /* EP buffering: double buffering */ -#else - EP6CFG &= ~bmVALID; -#endif - SYNCDELAY(); - - /* Disable all other EPs (EP1, EP4, and EP8). */ + /* Disable all other EPs (EP1, EP4, EP6, and EP8). */ EP1INCFG &= ~bmVALID; SYNCDELAY(); EP1OUTCFG &= ~bmVALID; SYNCDELAY(); EP4CFG &= ~bmVALID; SYNCDELAY(); + EP6CFG &= ~bmVALID; + SYNCDELAY(); EP8CFG &= ~bmVALID; SYNCDELAY(); /* EP2: Reset the FIFOs. */ /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */ RESETFIFO(0x02) -#ifdef DEBUG - /* Reset the FIFOs of EP6 when in debug mode. */ - RESETFIFO(0x06) -#endif /* EP2: Enable AUTOIN mode. Set FIFO width to 8bits. */ - EP2FIFOCFG = bmAUTOIN | ~bmWORDWIDE; + EP2FIFOCFG = bmAUTOIN; SYNCDELAY(); /* EP2: Auto-commit 512 (0x200) byte packets (due to AUTOIN = 1). */ @@ -109,24 +97,47 @@ static void setup_endpoints(void) SYNCDELAY(); } +static void send_fw_version(void) +{ + /* Populate the buffer. */ + struct version_info *const vi = (struct version_info *)EP0BUF; + vi->major = FX2LAFW_VERSION_MAJOR; + vi->minor = FX2LAFW_VERSION_MINOR; + + /* Send the message. */ + EP0BCH = 0; + EP0BCL = sizeof(struct version_info); +} + +static void send_revid_version(void) +{ + uint8_t *p; + + /* Populate the buffer. */ + p = (uint8_t *)EP0BUF; + *p = REVID; + + /* Send the message. */ + EP0BCH = 0; + EP0BCL = 1; +} + BOOL handle_vendorcommand(BYTE cmd) { /* Protocol implementation */ - switch (cmd) { case CMD_START: - gpif_acquisition_start(); - return TRUE; - case CMD_STOP: - GPIFABORT = 0xff; - /* TODO */ + vendor_command = cmd; + EP0BCL = 0; return TRUE; break; case CMD_GET_FW_VERSION: - /* TODO */ + send_fw_version(); + return TRUE; break; - default: - /* Unimplemented command. */ + case CMD_GET_REVID_VERSION: + send_revid_version(); + return TRUE; break; } @@ -148,7 +159,7 @@ BOOL handle_set_interface(BYTE ifc, BYTE alt_ifc) /* We only support interface 0, alternate interface 0. */ if (ifc != 0 || alt_ifc != 0) return FALSE; - + /* Perform procedure from TRM, section 2.3.7: */ /* (1) TODO. */ @@ -156,17 +167,11 @@ BOOL handle_set_interface(BYTE ifc, BYTE alt_ifc) /* (2) Reset data toggles of the EPs in the interface. */ /* Note: RESETTOGGLE() gets the EP number WITH bit 7 set/cleared. */ RESETTOGGLE(0x82); -#ifdef DEBUG - RESETTOGGLE(0x86); -#endif /* (3) Restore EPs to their default conditions. */ /* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */ RESETFIFO(0x02); /* TODO */ -#ifdef DEBUG - RESETFIFO(0x06); -#endif /* (4) Clear the HSNAK bit. Not needed, fx2lib does this. */ @@ -185,35 +190,50 @@ BOOL handle_set_configuration(BYTE cfg) return (cfg == 1) ? TRUE : FALSE; } -void sudav_isr(void) interrupt SUDAV_ISR +void sudav_isr(void) __interrupt SUDAV_ISR { got_sud = TRUE; CLEAR_SUDAV(); } -void sof_isr(void) interrupt SOF_ISR using 1 +void sof_isr(void) __interrupt SOF_ISR __using 1 { CLEAR_SOF(); } -void usbreset_isr(void) interrupt USBRESET_ISR +void usbreset_isr(void) __interrupt USBRESET_ISR { handle_hispeed(FALSE); CLEAR_USBRESET(); } -void hispeed_isr(void) interrupt HISPEED_ISR +void hispeed_isr(void) __interrupt HISPEED_ISR { handle_hispeed(TRUE); CLEAR_HISPEED(); } +void timer2_isr(void) __interrupt TF2_ISR +{ + /* Blink LED during acquisition, keep it on otherwise. */ + if (gpif_acquiring) { + if (--ledcounter == 0) { + PA1 = !PA1; + ledcounter = 1000; + } + } else { + PA1 = 1; /* LED on. */ + } + TF2 = 0; +} + void fx2lafw_init(void) { /* Set DYN_OUT and ENH_PKT bits, as recommended by the TRM. */ REVCTL = bmNOAUTOARM | bmSKIPCOMMIT; got_sud = FALSE; + vendor_command = 0; /* Renumerate. */ RENUMERATE_UNCOND(); @@ -228,6 +248,18 @@ void fx2lafw_init(void) ENABLE_HISPEED(); ENABLE_USBRESET(); + /* PA1 (LED) is an output. */ + PORTACFG = 0; + OEA = (1 << 1); + PA1 = 1; /* LED on. */ + + /* Init timer2. */ + RCAP2L = -500 & 0xff; + RCAP2H = (-500 & 0xff00) >> 8; + T2CON = 0; + ET2 = 1; + TR2 = 1; + /* Global (8051) interrupt enable. */ EA = 1; @@ -238,10 +270,40 @@ void fx2lafw_init(void) gpif_init_la(); } -void fx2lafw_run(void) +void fx2lafw_poll(void) { if (got_sud) { handle_setupdata(); got_sud = FALSE; } + + if (vendor_command) { + switch (vendor_command) { + case CMD_START: + if ((EP0CS & bmEPBUSY) != 0) + break; + + if (EP0BCL == sizeof(struct cmd_start_acquisition)) { + gpif_acquisition_start( + (const struct cmd_start_acquisition *)EP0BUF); + } + + /* Acknowledge the vendor command. */ + vendor_command = 0; + break; + default: + /* Unimplemented command. */ + vendor_command = 0; + break; + } + } + + gpif_poll(); +} + +void main(void) +{ + fx2lafw_init(); + while (1) + fx2lafw_poll(); }