X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=fx2lafw.c;h=1949a7c1fecfd46769cab5ff86947a3b9e6dac26;hb=b11ae8d63a1cb54034e43084d512666056a75f43;hp=018f7604dbdf731f54c26a6fcbdbb09b4dde5bbb;hpb=7563058183da25d5d968f5e43d4d098b34871e36;p=sigrok-firmware-fx2lafw.git

diff --git a/fx2lafw.c b/fx2lafw.c
index 018f7604..1949a7c1 100644
--- a/fx2lafw.c
+++ b/fx2lafw.c
@@ -1,5 +1,5 @@
 /*
- * This file is part of the fx2lafw project.
+ * This file is part of the sigrok-firmware-fx2lafw project.
  *
  * Copyright (C) 2011-2012 Uwe Hermann <uwe@hermann-uwe.de>
  *
@@ -14,8 +14,7 @@
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
+ * along with this program; if not, see <http://www.gnu.org/licenses/>.
  */
 
 /*
@@ -28,10 +27,9 @@
  *
  *  - We use the FX2 in GPIF mode to sample the data (asynchronously).
  *  - We use the internal 48MHz clock for GPIF.
- *  - The 8 channels/pins we sample (the GPIF data bus) are PB0-PB7.
- *    Support for 16 channels is not yet included, but might be added later.
- *  - Endpoint 2 is used for data transfers from FX2 to host.
- *  - The endpoint is quad-buffered.
+ *  - The 8 channels/pins we sample (the GPIF data bus) are PB0-PB7,
+ *    or PB0-PB7 + PD0-PD7 for 16-channel sampling. 
+ *  - Endpoint 2 (quad-buffered) is used for data transfers from FX2 to host.
  *
  * Documentation:
  *
@@ -40,19 +38,23 @@
 
 #include <fx2regs.h>
 #include <fx2macros.h>
+#include <fx2ints.h>
 #include <delay.h>
 #include <setupdat.h>
 #include <eputils.h>
 #include <gpif.h>
-
 #include <command.h>
 #include <fx2lafw.h>
 #include <gpif-acquisition.h>
 
 /* ... */
-volatile bit got_sud;
+volatile __bit got_sud;
 BYTE vendor_command;
 
+volatile WORD ledcounter = 1000;
+
+extern __bit gpif_acquiring;
+
 static void setup_endpoints(void)
 {
 	/* Setup EP2 (IN). */
@@ -157,7 +159,7 @@ BOOL handle_set_interface(BYTE ifc, BYTE alt_ifc)
 	/* We only support interface 0, alternate interface 0. */
 	if (ifc != 0 || alt_ifc != 0)
 		return FALSE;
-	
+
 	/* Perform procedure from TRM, section 2.3.7: */
 
 	/* (1) TODO. */
@@ -165,17 +167,11 @@ BOOL handle_set_interface(BYTE ifc, BYTE alt_ifc)
 	/* (2) Reset data toggles of the EPs in the interface. */
 	/* Note: RESETTOGGLE() gets the EP number WITH bit 7 set/cleared. */
 	RESETTOGGLE(0x82);
-#ifdef DEBUG
-	RESETTOGGLE(0x86);
-#endif
 
 	/* (3) Restore EPs to their default conditions. */
 	/* Note: RESETFIFO() gets the EP number WITHOUT bit 7 set/cleared. */
 	RESETFIFO(0x02);
 	/* TODO */
-#ifdef DEBUG
-	RESETFIFO(0x06);
-#endif
 
 	/* (4) Clear the HSNAK bit. Not needed, fx2lib does this. */
 
@@ -194,29 +190,43 @@ BOOL handle_set_configuration(BYTE cfg)
 	return (cfg == 1) ? TRUE : FALSE;
 }
 
-void sudav_isr(void) interrupt SUDAV_ISR
+void sudav_isr(void) __interrupt SUDAV_ISR
 {
 	got_sud = TRUE;
 	CLEAR_SUDAV();
 }
 
-void sof_isr(void) interrupt SOF_ISR using 1
+void sof_isr(void) __interrupt SOF_ISR __using 1
 {
 	CLEAR_SOF();
 }
 
-void usbreset_isr(void) interrupt USBRESET_ISR
+void usbreset_isr(void) __interrupt USBRESET_ISR
 {
 	handle_hispeed(FALSE);
 	CLEAR_USBRESET();
 }
 
-void hispeed_isr(void) interrupt HISPEED_ISR
+void hispeed_isr(void) __interrupt HISPEED_ISR
 {
 	handle_hispeed(TRUE);
 	CLEAR_HISPEED();
 }
 
+void timer2_isr(void) __interrupt TF2_ISR
+{
+	/* Blink LED during acquisition, keep it on otherwise. */
+	if (gpif_acquiring) {
+		if (--ledcounter == 0) {
+			PA1 = !PA1;
+			ledcounter = 1000;
+		}
+	} else {
+		PA1 = 1; /* LED on. */
+	}
+	TF2 = 0;
+}
+
 void fx2lafw_init(void)
 {
 	/* Set DYN_OUT and ENH_PKT bits, as recommended by the TRM. */
@@ -238,6 +248,18 @@ void fx2lafw_init(void)
 	ENABLE_HISPEED();
 	ENABLE_USBRESET();
 
+	/* PA1 (LED) is an output. */
+	PORTACFG = 0;
+	OEA = (1 << 1);
+	PA1 = 1; /* LED on. */
+
+	/* Init timer2. */
+	RCAP2L = -500 & 0xff;
+	RCAP2H = (-500 & 0xff00) >> 8;
+	T2CON = 0;
+	ET2 = 1;
+	TR2 = 1;
+
 	/* Global (8051) interrupt enable. */
 	EA = 1;