X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Fuart%2Fpd.py;h=d71fc23115760c06fd9e2eef56ab64ba1dc47770;hb=8705ddc81b001d7f79ed94e9aa34b792cfdd4481;hp=5a6dfc00ecb8ee7066c946eb010924eee54b378a;hpb=3a1803b09807eafba04c5e9fb0110d1c0d9f0eaf;p=libsigrokdecode.git

diff --git a/decoders/uart/pd.py b/decoders/uart/pd.py
index 5a6dfc0..d71fc23 100644
--- a/decoders/uart/pd.py
+++ b/decoders/uart/pd.py
@@ -97,7 +97,8 @@ class Decoder(srd.Decoder):
         # TODO: Options to invert the signal(s).
     }
     annotations = [
-        ['Data', 'UART data'],
+        ['RX data', 'UART RX data'],
+        ['TX data', 'UART TX data'],
         ['Start bits', 'UART start bits'],
         ['Parity bits', 'UART parity bits'],
         ['Stop bits', 'UART stop bits'],
@@ -117,6 +118,7 @@ class Decoder(srd.Decoder):
         self.put(s - halfbit, s + halfbit, self.out_proto, data)
 
     def __init__(self, **kwargs):
+        self.samplerate = None
         self.samplenum = 0
         self.frame_start = [-1, -1]
         self.startbit = [-1, -1]
@@ -129,17 +131,15 @@ class Decoder(srd.Decoder):
         self.oldbit = [1, 1]
         self.oldpins = [1, 1]
 
-    def start(self, metadata):
-        self.samplerate = metadata['samplerate']
-        self.out_proto = self.add(srd.OUTPUT_PROTO, 'uart')
-        self.out_ann = self.add(srd.OUTPUT_ANN, 'uart')
+    def start(self):
+        self.out_proto = self.register(srd.OUTPUT_PYTHON)
+        self.out_ann = self.register(srd.OUTPUT_ANN)
 
-        # The width of one UART bit in number of samples.
-        self.bit_width = \
-            float(self.samplerate) / float(self.options['baudrate'])
-
-    def report(self):
-        pass
+    def metadata(self, key, value):
+        if key == srd.SRD_CONF_SAMPLERATE:
+            self.samplerate = value;
+            # The width of one UART bit in number of samples.
+            self.bit_width = float(self.samplerate) / float(self.options['baudrate'])
 
     # Return true if we reached the middle of the desired bit, false otherwise.
     def reached_bit(self, rxtx, bitnum):
@@ -188,7 +188,7 @@ class Decoder(srd.Decoder):
         self.state[rxtx] = 'GET DATA BITS'
 
         self.putp(['STARTBIT', rxtx, self.startbit[rxtx]])
-        self.putg([1, ['Start bit', 'Start', 'S']])
+        self.putg([2, ['Start bit', 'Start', 'S']])
 
     def get_data_bits(self, rxtx, signal):
         # Skip samples until we're in the middle of the desired data bit.
@@ -220,18 +220,18 @@ class Decoder(srd.Decoder):
 
         self.putp(['DATA', rxtx, self.databyte[rxtx]])
 
-        s = 'RX: ' if (rxtx == RX) else 'TX: '
         b, f = self.databyte[rxtx], self.options['format']
         if f == 'ascii':
-            self.putx(rxtx, [0, [s + chr(b)]])
+            c = chr(b) if chr(b).isprintable() else '[%02X]' % b
+            self.putx(rxtx, [rxtx, [c]])
         elif f == 'dec':
-            self.putx(rxtx, [0, [s + str(b)]])
+            self.putx(rxtx, [rxtx, [str(b)]])
         elif f == 'hex':
-            self.putx(rxtx, [0, [s + hex(b)[2:]]])
+            self.putx(rxtx, [rxtx, [hex(b)[2:].zfill(2).upper()]])
         elif f == 'oct':
-            self.putx(rxtx, [0, [s + oct(b)[2:]]])
+            self.putx(rxtx, [rxtx, [oct(b)[2:].zfill(3)]])
         elif f == 'bin':
-            self.putx(rxtx, [0, [s + bin(b)[2:]]])
+            self.putx(rxtx, [rxtx, [bin(b)[2:].zfill(8)]])
         else:
             raise Exception('Invalid data format option: %s' % f)
 
@@ -252,11 +252,11 @@ class Decoder(srd.Decoder):
         if parity_ok(self.options['parity_type'], self.paritybit[rxtx],
                      self.databyte[rxtx], self.options['num_data_bits']):
             self.putp(['PARITYBIT', rxtx, self.paritybit[rxtx]])
-            self.putg([2, ['Parity bit', 'Parity', 'P']])
+            self.putg([3, ['Parity bit', 'Parity', 'P']])
         else:
             # TODO: Return expected/actual parity values.
             self.putp(['PARITY ERROR', rxtx, (0, 1)]) # FIXME: Dummy tuple...
-            self.putg([4, ['Parity error', 'Parity err', 'PE']])
+            self.putg([5, ['Parity error', 'Parity err', 'PE']])
 
     # TODO: Currently only supports 1 stop bit.
     def get_stop_bits(self, rxtx, signal):
@@ -271,15 +271,17 @@ class Decoder(srd.Decoder):
         # Stop bits must be 1. If not, we report an error.
         if self.stopbit1[rxtx] != 1:
             self.putp(['INVALID STOPBIT', rxtx, self.stopbit1[rxtx]])
-            self.putg([4, ['Frame error', 'Frame err', 'FE']])
+            self.putg([5, ['Frame error', 'Frame err', 'FE']])
             # TODO: Abort? Ignore the frame? Other?
 
         self.state[rxtx] = 'WAIT FOR START BIT'
 
         self.putp(['STOPBIT', rxtx, self.stopbit1[rxtx]])
-        self.putg([3, ['Stop bit', 'Stop', 'T']])
+        self.putg([4, ['Stop bit', 'Stop', 'T']])
 
     def decode(self, ss, es, data):
+        if self.samplerate is None:
+            raise Exception("Cannot decode without samplerate.")
         # TODO: Either RX or TX could be omitted (optional probe).
         for (self.samplenum, pins) in data: