X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Ftca6408a%2Fpd.py;h=4ca1082a8bcfe9e2645d46ac502063332d898530;hb=42d4d65c3d34ae9bfa74c40fafd1ca657d05a91b;hp=fdfebeddb23d92a26b31a98248993c4b7a405951;hpb=460e6cfa5d45c8d2ba0f5be1235ab31d4ec9508b;p=libsigrokdecode.git

diff --git a/decoders/tca6408a/pd.py b/decoders/tca6408a/pd.py
index fdfebed..4ca1082 100644
--- a/decoders/tca6408a/pd.py
+++ b/decoders/tca6408a/pd.py
@@ -56,28 +56,34 @@ class Decoder(srd.Decoder):
     def reset(self):
         self.state = 'IDLE'
         self.chip = -1
-        self.ss_logic = -1
+
+        self.logic_output_es = 0
+        self.logic_value = 0
 
     def start(self):
         self.out_ann = self.register(srd.OUTPUT_ANN)
         self.out_logic = self.register(srd.OUTPUT_LOGIC)
 
+    def flush(self):
+        self.put_logic_states()
+
     def putx(self, data):
         self.put(self.ss, self.es, self.out_ann, data)
 
-    def putl(self, data):
-        self.put(self.ss_logic, self.ss_logic, self.out_logic, data)
+    def put_logic_states(self):
+        if (self.es > self.logic_output_es):
+            data = bytes([self.logic_value])
+            self.put(self.logic_output_es, self.es, self.out_logic, [0, data])
+            self.logic_output_es = self.es
 
     def handle_reg_0x00(self, b):
         self.putx([1, ['State of inputs: %02X' % b]])
         # TODO
 
     def handle_reg_0x01(self, b):
+        self.put_logic_states()
         self.putx([1, ['Outputs set: %02X' % b]])
-        self.ss_logic = self.ss
-        for i in range(NUM_OUTPUT_CHANNELS):
-            bit = (b & (1 << i)) != 0
-            self.putl([i, bytes([bit])])
+        self.logic_value = b
 
     def handle_reg_0x02(self, b):
         self.putx([1, ['Polarity inverted: %02X' % b]])