X-Git-Url: http://sigrok.org/gitweb/?a=blobdiff_plain;f=decoders%2Fspi.py;h=9fb6036db609153957cacdc68a33146dc78695e3;hb=a10bfc48b04de832a62a474b34b23f8f24662e9a;hp=e6a59bf6cbdda9e49482ddc0d3667f8fea2e3d00;hpb=9a12a6e7af3d7091d8e35dd1c731402cb80a01b0;p=libsigrokdecode.git

diff --git a/decoders/spi.py b/decoders/spi.py
index e6a59bf..9fb6036 100644
--- a/decoders/spi.py
+++ b/decoders/spi.py
@@ -36,11 +36,13 @@ class Decoder(srd.Decoder):
         {'id': 'sck', 'name': 'CLK', 'desc': 'SPI clock line'},
     ]
     options = {}
-    annotations = []
+    annotations = [
+        ['TODO', 'TODO'],
+    ]
 
     def __init__(self):
         self.oldsck = 1
-        self.rxcount = 0
+        self.bitcount = 0
         self.rxdata = 0
         self.bytesreceived = 0
 
@@ -51,40 +53,41 @@ class Decoder(srd.Decoder):
     def report(self):
         return 'SPI: %d bytes received' % self.bytesreceived
 
-    def decode(self, timeoffset, duration, data):
+    def decode(self, ss, es, data):
         # HACK! At the moment the number of probes is not handled correctly.
         # E.g. if an input file (-i foo.sr) has more than two probes enabled.
-        for (samplenum, (sdata, sck, x, y, z, a)) in data:
+        # for (samplenum, (sdata, sck, x, y, z, a)) in data:
+        # for (samplenum, (cs, miso, sck, mosi, wp, hold)) in data:
+        for (samplenum, (cs, miso, sck, sdata, wp, hold)) in data:
 
-            # Sample SDATA on rising SCK
+            # Sample SDATA on rising SCK.
             if sck == self.oldsck:
                 continue
             self.oldsck = sck
-            if not sck:
+            if sck == 0:
                 continue
 
-            # If this is first bit, save timestamp
-            if self.rxcount == 0:
-                self.time = timeoffset # FIXME
-            # Receive bit into our shift register
-            if sdata:
-                self.rxdata |= 1 << (7 - self.rxcount)
-            self.rxcount += 1
-            # Continue to receive if not a byte yet
-            if self.rxcount != 8:
+            # If this is the first bit, save timestamp.
+            if self.bitcount == 0:
+                self.time = samplenum
+
+            # Receive bit into our shift register.
+            if sdata == 1:
+                self.rxdata |= 1 << (7 - self.bitcount)
+
+            self.bitcount += 1
+
+            # Continue to receive if not a byte yet.
+            if self.bitcount != 8:
                 continue
-            # Received a byte, pass up to sigrok
-            outdata = {'time':self.time,
-                'duration':timeoffset + duration - self.time,
-                'data':self.rxdata,
-                'display':('%02X' % self.rxdata),
-                'type':'spi',
-            }
-            # self.put(0, 0, self.out_proto, out_proto)
-            self.put(0, 0, self.out_ann, outdata)
-            # Reset decoder state
+
+            # self.put(0, 0, self.out_proto, out_proto) # TODO
+            self.put(0, 0, self.out_ann, [0, ['0x%02x' % self.rxdata]])
+
+            # Reset decoder state.
             self.rxdata = 0
-            self.rxcount = 0
-            # Keep stats for summary
+            self.bitcount = 0
+
+            # Keep stats for summary.
             self.bytesreceived += 1